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mb/siemens/mc_apl5: Correct the Tx signal from SATA port 0 

Because of an incorrect transmit voltage swing, the signal must be
adjusted. The factor of slices for full swing level can be corrected via
the High Speed I/O Transmit Control Register 3. The appropriate value of
0.7 V was determined by using an oscilloscope.

Change-Id: I965960004ca44f1b37b16ce6484000fa7fd8ad90
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76175
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jan Samek <jan.samek@siemens.com>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
This commit is contained in:
Mario Scheithauer 2023-06-28 10:18:29 +02:00 committed by Felix Held
parent b34576b03b
commit 15e1d97463
1 changed files with 11 additions and 0 deletions
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11
src/mainboard/siemens/mc_apl1/variants/mc_apl5/mainboard.c
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@ -13,6 +13,9 @@
#include <baseboard/variants.h> #include <baseboard/variants.h>
#include <types.h> #include <types.h>
#define TX_DWORD3_P0 0xc8c
#define TX_SWING_MASK 0x00ff0000
void variant_mainboard_final(void) void variant_mainboard_final(void)
{ {
struct device *dev = NULL; struct device *dev = NULL;
@ -32,6 +35,14 @@ void variant_mainboard_final(void)
*/ */
pcr_or32(PID_LPC, PCR_LPC_PRC, (PCR_LPC_CCE_EN | PCR_LPC_PCE_EN)); pcr_or32(PID_LPC, PCR_LPC_PRC, (PCR_LPC_CCE_EN | PCR_LPC_PCE_EN));
/*
* Correct the SATA transmit signal via the High Speed I/O Transmit
* Control Register 3 on SATA port 0.
* Bit [23:16] sets the output voltage swing for TX line.
* The value 0x5a sets the swing level to 0.7 V.
*/
pcr_rmw32(PID_MODPHY, TX_DWORD3_P0, ~TX_SWING_MASK, 0x5a << 16);
/* Set Master Enable for on-board PCI device if allowed. */ /* Set Master Enable for on-board PCI device if allowed. */
dev = dev_find_device(PCI_VID_SIEMENS, 0x403e, 0); dev = dev_find_device(PCI_VID_SIEMENS, 0x403e, 0);
if (dev) { if (dev) {