nb/intel/i945/northbridge.c: Reserve upper part of lower memory
This memory is used for option roms and BIOS. This matches the ACPI code. Change-Id: I53dd4b967569889108352ca70086a12ce252e8e0 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49624 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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@ -107,12 +107,14 @@ static void mch_domain_read_resources(struct device *dev)
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/* Report the memory regions */
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/* Report the memory regions */
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ram_resource(dev, 3, 0, 0xa0000 / KiB);
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ram_resource(dev, 3, 0, 0xa0000 / KiB);
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ram_resource(dev, 4, 0xc0000 / KiB, (tomk - 0xc0000 / KiB));
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ram_resource(dev, 4, 1 * MiB / KiB, (tomk - 1 * MiB / KiB));
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uma_resource(dev, 5, uma_memory_base / KiB, uma_memory_size / KiB);
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uma_resource(dev, 5, uma_memory_base / KiB, uma_memory_size / KiB);
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mmio_resource(dev, 6, tseg_memory_base / KiB, tseg_memory_size / KiB);
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mmio_resource(dev, 6, tseg_memory_base / KiB, tseg_memory_size / KiB);
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uma_resource(dev, 7, cbmem_topk, delta_cbmem);
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uma_resource(dev, 7, cbmem_topk, delta_cbmem);
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/* legacy VGA memory */
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/* legacy VGA memory */
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mmio_resource(dev, 8, 0xa0000 / KiB, (0xc0000 - 0xa0000) / KiB);
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mmio_resource(dev, 8, 0xa0000 / KiB, (0xc0000 - 0xa0000) / KiB);
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/* RAM to be used for option roms and BIOS */
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reserved_ram_resource(dev, 9, 0xc0000 / KiB, (1 * MiB - 0xc0000) / KiB);
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}
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}
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static void mch_domain_set_resources(struct device *dev)
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static void mch_domain_set_resources(struct device *dev)
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