mb/google/dedede/var/metaknight: Disable I2C port 3

Disable I2C port 3 for metaknight

BUG=b:169813211
BRANCH=None
TEST=build metaknight firmware

Change-Id: Ic4a056d53a8c8abd04a9b786428da0986a255276
Signed-off-by: Tim Chen <tim-chen@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47389
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
This commit is contained in:
Tim Chen 2020-11-10 16:32:14 +08:00 committed by Tim Wawrzynczak
parent 5fd29317e8
commit 161de9f80f
1 changed files with 11 additions and 4 deletions

View File

@ -11,7 +11,7 @@ chip soc/intel/jasperlake
#| I2C0 | Trackpad |
#| I2C1 | Digitizer |
#| I2C2 | Touchscreen |
#| I2C3 | Camera |
#| I2C3 | TBD |
#| I2C4 | Audio |
#+-------------------+---------------------------+
register "common_soc_config" = "{
@ -28,15 +28,22 @@ chip soc/intel/jasperlake
.i2c[2] = {
.speed = I2C_SPEED_FAST,
},
.i2c[3] = {
.speed = I2C_SPEED_FAST,
},
.i2c[4] = {
.speed = I2C_SPEED_FAST,
},
}"
register "SerialIoI2cMode" = "{
[PchSerialIoIndexI2C0] = PchSerialIoPci,
[PchSerialIoIndexI2C1] = PchSerialIoPci,
[PchSerialIoIndexI2C2] = PchSerialIoPci,
[PchSerialIoIndexI2C3] = PchSerialIoDisabled,
[PchSerialIoIndexI2C4] = PchSerialIoPci,
[PchSerialIoIndexI2C5] = PchSerialIoDisabled,
}"
device domain 0 on
device pci 15.0 on end
device pci 15.3 off end # I2C 3
end
end