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mb/google/brya/var/vell: increase RFI Spread Spectrum to 6% 

Increase RFI Spread Spectrum to 6% for Vell as RF team request. The
default of Spread Spectrum in FSP is 1.5%, and set 1.5% in baseboard
as default.

BUG=b:228929196
TEST=emerge-brya coreboot and pass RF test as before

Change-Id: I7cdca8f51ad18f4ab03e4e6c744b60da68263ce2
Signed-off-by: Robert Chen <robert.chen@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63440
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Robert Chen 2022-04-07 16:10:31 +08:00 committed by Felix Held
parent 9aa7a25c2d
commit 161e731d7e
1 changed files with 3 additions and 0 deletions
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3
src/mainboard/google/brya/variants/vell/overridetree.cb
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@ -71,6 +71,9 @@ chip soc/intel/alderlake
register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)"
register "sagv" = "SaGv_Enabled" register "sagv" = "SaGv_Enabled"
# FIVR RFI Spread Spectrum 6%
register "fivr_spread_spectrum" = "FIVR_SS_6"
# I2C Port Config # I2C Port Config
register "serial_io_i2c_mode" = "{ register "serial_io_i2c_mode" = "{
[PchSerialIoIndexI2C0] = PchSerialIoPci, [PchSerialIoIndexI2C0] = PchSerialIoPci,