soc/intel/broadwell: Remove unnecessary array

The MAD_DIMM registers can be read within the loop just fine.

Change-Id: Id0c79aaa506f7545826445bc5b065408105b46ba
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46369
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
Angel Pons 2020-10-13 23:37:07 +02:00
parent 973c9d45ad
commit 162a737599
2 changed files with 5 additions and 5 deletions

View File

@ -87,6 +87,9 @@
#define MCHBAR16(x) *((volatile u16 *)(MCH_BASE_ADDRESS + (x))) #define MCHBAR16(x) *((volatile u16 *)(MCH_BASE_ADDRESS + (x)))
#define MCHBAR32(x) *((volatile u32 *)(MCH_BASE_ADDRESS + (x))) #define MCHBAR32(x) *((volatile u32 *)(MCH_BASE_ADDRESS + (x)))
/* Memory controller characteristics */
#define NUM_CHANNELS 2
#define MAD_CHNL 0x5000 #define MAD_CHNL 0x5000
#define MAD_DIMM(ch) (0x5004 + 4 * (ch)) #define MAD_DIMM(ch) (0x5004 + 4 * (ch))

View File

@ -27,12 +27,9 @@
*/ */
static void report_memory_config(void) static void report_memory_config(void)
{ {
u32 addr_decode_ch[2];
int i; int i;
const u32 addr_decoder_common = MCHBAR32(MAD_CHNL); const u32 addr_decoder_common = MCHBAR32(MAD_CHNL);
addr_decode_ch[0] = MCHBAR32(MAD_DIMM(0));
addr_decode_ch[1] = MCHBAR32(MAD_DIMM(1));
printk(BIOS_DEBUG, "memcfg DDR3 clock %d MHz\n", printk(BIOS_DEBUG, "memcfg DDR3 clock %d MHz\n",
(MCHBAR32(MC_BIOS_DATA) * 13333 * 2 + 50) / 100); (MCHBAR32(MC_BIOS_DATA) * 13333 * 2 + 50) / 100);
@ -42,8 +39,8 @@ static void report_memory_config(void)
(addr_decoder_common >> 2) & 3, (addr_decoder_common >> 2) & 3,
(addr_decoder_common >> 4) & 3); (addr_decoder_common >> 4) & 3);
for (i = 0; i < ARRAY_SIZE(addr_decode_ch); i++) { for (i = 0; i < NUM_CHANNELS; i++) {
u32 ch_conf = addr_decode_ch[i]; const u32 ch_conf = MCHBAR32(MAD_DIMM(i));
printk(BIOS_DEBUG, "memcfg channel[%d] config (%8.8x):\n", i, ch_conf); printk(BIOS_DEBUG, "memcfg channel[%d] config (%8.8x):\n", i, ch_conf);