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intel/skylake: mask off txstate before setting new gpio value 

The previously driven TX state of the buffer was not
being cleared before or'ing in the new value. Fix this
oversight.

BUG=chrome-os-partner:43522
BRANCH=None
TEST=Built and booted glados. Also dumped assembly and saw the
     masking happen.

Change-Id: I74ea469564d37d6b29e9481b0ea704f04f54ac30
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Original-Commit-Id: d399e8b32b30b8b2275bb6ff8dd24f7d5cfeadda
Original-Change-Id: I341b396af5de20ffeeb2e42066b224dd54251793
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/294541
Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/11416
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
This commit is contained in:
Aaron Durbin 2015-08-19 21:07:14 -05:00 committed by Patrick Georgi
parent d2d4b5a4ab
commit 162aee9a5d
1 changed files with 1 additions and 0 deletions
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1
src/soc/intel/skylake/gpio.c
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@ -383,6 +383,7 @@ void gpio_set(gpio_t gpio_num, int value)
return;
reg = read32(&dw_regs[0]);
reg &= ~PAD_FIELD(GPIOTXSTATE, MASK);
reg |= PAD_FIELD_VAL(GPIOTXSTATE, value);
write32(&dw_regs[0], reg);
/* GPIO port ids support posted write semantics. */