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sb/intel: Use defined CONFIG_HPET_ADDRESS 

Change-Id: I15ae5e70ba351e89d5ea9d04dbb1efdfbb372bba
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36458
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
Elyes HAOUAS 2019-10-30 11:28:42 +01:00 committed by Nico Huber
parent 4ec67fc82c
commit 1644e48985
11 changed files with 32 additions and 32 deletions
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2
src/soc/intel/baytrail/acpi/lpc.asl
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@ -59,7 +59,7 @@ Device (LPCB)
Name(_CRS, ResourceTemplate() Name(_CRS, ResourceTemplate()
{ {
Memory32Fixed(ReadOnly, 0xfed00000, 0x400) Memory32Fixed(ReadOnly, CONFIG_HPET_ADDRESS, 0x400)
}) })
} }

2
src/soc/intel/braswell/acpi/lpc.asl
View File

@ -71,7 +71,7 @@ Device (LPCB)
Name(_CRS, ResourceTemplate() Name(_CRS, ResourceTemplate()
{ {
Memory32Fixed(ReadOnly, 0xfed00000, 0x400) Memory32Fixed(ReadOnly, CONFIG_HPET_ADDRESS, 0x400)
}) })
} }
#endif #endif

8
src/soc/intel/broadwell/acpi/lpc.asl
View File

@ -74,7 +74,7 @@ Device (LPCB)
Name (BUF0, ResourceTemplate() Name (BUF0, ResourceTemplate()
{ {
Memory32Fixed(ReadOnly, 0xfed00000, 0x400, FED0) Memory32Fixed(ReadOnly, CONFIG_HPET_ADDRESS, 0x400, FED0)
}) })
Method (_STA, 0) // Device Status Method (_STA, 0) // Device Status
@ -99,15 +99,15 @@ Device (LPCB)
\_SB.PCI0.LPCB.HPET.FED0._BAS, HPT0) \_SB.PCI0.LPCB.HPET.FED0._BAS, HPT0)
If (Lequal(HPAS, 1)) { If (Lequal(HPAS, 1)) {
Store(0xfed01000, HPT0) Add(CONFIG_HPET_ADDRESS, 0x1000, HPT0)
} }
If (Lequal(HPAS, 2)) { If (Lequal(HPAS, 2)) {
Store(0xfed02000, HPT0) Add(CONFIG_HPET_ADDRESS, 0x2000, HPT0)
} }
If (Lequal(HPAS, 3)) { If (Lequal(HPAS, 3)) {
Store(0xfed03000, HPT0) Add(CONFIG_HPET_ADDRESS, 0x3000, HPT0)
} }
} }

2
src/soc/intel/fsp_baytrail/acpi/lpc.asl
View File

@ -59,7 +59,7 @@ Device (LPCB)
Name(_CRS, ResourceTemplate() Name(_CRS, ResourceTemplate()
{ {
Memory32Fixed(ReadOnly, 0xfed00000, 0x400) Memory32Fixed(ReadOnly, CONFIG_HPET_ADDRESS, 0x400)
}) })
} }

2
src/soc/intel/fsp_broadwell_de/acpi/lpc.asl
View File

@ -44,7 +44,7 @@ Device (LPC0)
Name(_CRS, ResourceTemplate() Name(_CRS, ResourceTemplate()
{ {
Memory32Fixed(ReadOnly, 0xfed00000, 0x400) Memory32Fixed(ReadOnly, CONFIG_HPET_ADDRESS, 0x400)
}) })
} }

8
src/southbridge/intel/bd82x6x/acpi/lpc.asl
View File

@ -97,7 +97,7 @@ Device (LPCB)
Name(BUF0, ResourceTemplate() Name(BUF0, ResourceTemplate()
{ {
Memory32Fixed(ReadOnly, 0xfed00000, 0x400, FED0) Memory32Fixed(ReadOnly, CONFIG_HPET_ADDRESS, 0x400, FED0)
}) })
Method (_STA, 0) // Device Status Method (_STA, 0) // Device Status
@ -120,15 +120,15 @@ Device (LPCB)
If (HPTE) { If (HPTE) {
CreateDWordField(BUF0, \_SB.PCI0.LPCB.HPET.FED0._BAS, HPT0) CreateDWordField(BUF0, \_SB.PCI0.LPCB.HPET.FED0._BAS, HPT0)
If (Lequal(HPAS, 1)) { If (Lequal(HPAS, 1)) {
Store(0xfed01000, HPT0) Add(CONFIG_HPET_ADDRESS, 0x1000, HPT0)
} }
If (Lequal(HPAS, 2)) { If (Lequal(HPAS, 2)) {
Store(0xfed02000, HPT0) Add(CONFIG_HPET_ADDRESS, 0x2000, HPT0)
} }
If (Lequal(HPAS, 3)) { If (Lequal(HPAS, 3)) {
Store(0xfed03000, HPT0) Add(CONFIG_HPET_ADDRESS, 0x3000, HPT0)
} }
} }

8
src/southbridge/intel/fsp_rangeley/acpi/lpc.asl
View File

@ -97,7 +97,7 @@ Device (LPCB)
Name(BUF0, ResourceTemplate() Name(BUF0, ResourceTemplate()
{ {
Memory32Fixed(ReadOnly, 0xfed00000, 0x400, FED0) Memory32Fixed(ReadOnly, CONFIG_HPET_ADDRESS, 0x400, FED0)
}) })
Method (_STA, 0) // Device Status Method (_STA, 0) // Device Status
@ -120,15 +120,15 @@ Device (LPCB)
If (HPTE) { If (HPTE) {
CreateDWordField(BUF0, \_SB.PCI0.LPCB.HPET.FED0._BAS, HPT0) CreateDWordField(BUF0, \_SB.PCI0.LPCB.HPET.FED0._BAS, HPT0)
If (Lequal(HPAS, 1)) { If (Lequal(HPAS, 1)) {
Store(0xfed01000, HPT0) Add(CONFIG_HPET_ADDRESS, 0x1000, HPT0)
} }
If (Lequal(HPAS, 2)) { If (Lequal(HPAS, 2)) {
Store(0xfed02000, HPT0) Add(CONFIG_HPET_ADDRESS, 0x2000, HPT0)
} }
If (Lequal(HPAS, 3)) { If (Lequal(HPAS, 3)) {
Store(0xfed03000, HPT0) Add(CONFIG_HPET_ADDRESS, 0x3000, HPT0)
} }
} }

8
src/southbridge/intel/i82801gx/acpi/lpc.asl
View File

@ -79,7 +79,7 @@ Device (LPCB)
Name(BUF0, ResourceTemplate() Name(BUF0, ResourceTemplate()
{ {
Memory32Fixed(ReadOnly, 0xfed00000, 0x400, FED0) Memory32Fixed(ReadOnly, CONFIG_HPET_ADDRESS, 0x400, FED0)
}) })
Method (_STA, 0) // Device Status Method (_STA, 0) // Device Status
@ -102,15 +102,15 @@ Device (LPCB)
If (HPTE) { If (HPTE) {
CreateDWordField(BUF0, \_SB.PCI0.LPCB.HPET.FED0._BAS, HPT0) CreateDWordField(BUF0, \_SB.PCI0.LPCB.HPET.FED0._BAS, HPT0)
If (Lequal(HPAS, 1)) { If (Lequal(HPAS, 1)) {
Store(0xfed01000, HPT0) Add(CONFIG_HPET_ADDRESS, 0x1000, HPT0)
} }
If (Lequal(HPAS, 2)) { If (Lequal(HPAS, 2)) {
Store(0xfed02000, HPT0) Add(CONFIG_HPET_ADDRESS, 0x2000, HPT0)
} }
If (Lequal(HPAS, 3)) { If (Lequal(HPAS, 3)) {
Store(0xfed03000, HPT0) Add(CONFIG_HPET_ADDRESS, 0x3000, HPT0)
} }
} }

8
src/southbridge/intel/i82801ix/acpi/lpc.asl
View File

@ -79,7 +79,7 @@ Device (LPCB)
Name(BUF0, ResourceTemplate() Name(BUF0, ResourceTemplate()
{ {
Memory32Fixed(ReadOnly, 0xfed00000, 0x400, FED0) Memory32Fixed(ReadOnly, CONFIG_HPET_ADDRESS, 0x400, FED0)
}) })
Method (_STA, 0) // Device Status Method (_STA, 0) // Device Status
@ -102,15 +102,15 @@ Device (LPCB)
If (HPTE) { If (HPTE) {
CreateDWordField(BUF0, \_SB.PCI0.LPCB.HPET.FED0._BAS, HPT0) CreateDWordField(BUF0, \_SB.PCI0.LPCB.HPET.FED0._BAS, HPT0)
If (Lequal(HPAS, 1)) { If (Lequal(HPAS, 1)) {
Store(0xfed01000, HPT0) Add(CONFIG_HPET_ADDRESS, 0x1000, HPT0)
} }
If (Lequal(HPAS, 2)) { If (Lequal(HPAS, 2)) {
Store(0xfed02000, HPT0) Add(CONFIG_HPET_ADDRESS, 0x2000, HPT0)
} }
If (Lequal(HPAS, 3)) { If (Lequal(HPAS, 3)) {
Store(0xfed03000, HPT0) Add(CONFIG_HPET_ADDRESS, 0x3000, HPT0)
} }
} }

8
src/southbridge/intel/i82801jx/acpi/lpc.asl
View File

@ -79,7 +79,7 @@ Device (LPCB)
Name(BUF0, ResourceTemplate() Name(BUF0, ResourceTemplate()
{ {
Memory32Fixed(ReadOnly, 0xfed00000, 0x400, FED0) Memory32Fixed(ReadOnly, CONFIG_HPET_ADDRESS, 0x400, FED0)
}) })
Method (_STA, 0) // Device Status Method (_STA, 0) // Device Status
@ -102,15 +102,15 @@ Device (LPCB)
If (HPTE) { If (HPTE) {
CreateDWordField(BUF0, \_SB.PCI0.LPCB.HPET.FED0._BAS, HPT0) CreateDWordField(BUF0, \_SB.PCI0.LPCB.HPET.FED0._BAS, HPT0)
If (Lequal(HPAS, 1)) { If (Lequal(HPAS, 1)) {
Store(0xfed01000, HPT0) Add(CONFIG_HPET_ADDRESS, 0x1000, HPT0)
} }
If (Lequal(HPAS, 2)) { If (Lequal(HPAS, 2)) {
Store(0xfed02000, HPT0) Add(CONFIG_HPET_ADDRESS, 0x2000, HPT0)
} }
If (Lequal(HPAS, 3)) { If (Lequal(HPAS, 3)) {
Store(0xfed03000, HPT0) Add(CONFIG_HPET_ADDRESS, 0x3000, HPT0)
} }
} }

8
src/southbridge/intel/lynxpoint/acpi/lpc.asl
View File

@ -83,7 +83,7 @@ Device (LPCB)
Name(BUF0, ResourceTemplate() Name(BUF0, ResourceTemplate()
{ {
Memory32Fixed(ReadOnly, 0xfed00000, 0x400, FED0) Memory32Fixed(ReadOnly, CONFIG_HPET_ADDRESS, 0x400, FED0)
}) })
Method (_STA, 0) // Device Status Method (_STA, 0) // Device Status
@ -106,15 +106,15 @@ Device (LPCB)
If (HPTE) { If (HPTE) {
CreateDWordField(BUF0, \_SB.PCI0.LPCB.HPET.FED0._BAS, HPT0) CreateDWordField(BUF0, \_SB.PCI0.LPCB.HPET.FED0._BAS, HPT0)
If (Lequal(HPAS, 1)) { If (Lequal(HPAS, 1)) {
Store(0xfed01000, HPT0) Add(CONFIG_HPET_ADDRESS, 0x1000, HPT0)
} }
If (Lequal(HPAS, 2)) { If (Lequal(HPAS, 2)) {
Store(0xfed02000, HPT0) Add(CONFIG_HPET_ADDRESS, 0x2000, HPT0)
} }
If (Lequal(HPAS, 3)) { If (Lequal(HPAS, 3)) {
Store(0xfed03000, HPT0) Add(CONFIG_HPET_ADDRESS, 0x3000, HPT0)
} }
} }