uart8250mem: Add wrapper for MMIO register access
For some UART hardware registers are 32 bits wide, so we will need base_port + reg << 2 instead. Prepare for that change and unification of MMIO between ARM and x86. Change-Id: I5fa2c2f7ee4872499a01754c1ba872a8addf499c Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7793 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
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@ -22,6 +22,7 @@
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#include <console/uart.h>
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#include <device/device.h>
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#include <delay.h>
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#include <stdint.h>
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#include "uart8250reg.h"
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/* Should support 8250, 16450, 16550, 16550A type UARTs */
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@ -33,65 +34,75 @@
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#define SINGLE_CHAR_TIMEOUT (50 * 1000)
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#define FIFO_TIMEOUT (16 * SINGLE_CHAR_TIMEOUT)
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static int uart8250_mem_can_tx_byte(unsigned base_port)
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static uint8_t uart8250_read(void *base, uint8_t reg)
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{
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return read8(base_port + UART8250_LSR) & UART8250_LSR_THRE;
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return read8((uintptr_t) (base + reg));
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}
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static void uart8250_mem_tx_byte(unsigned base_port, unsigned char data)
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static void uart8250_write(void *base, uint8_t reg, uint8_t data)
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{
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write8((uintptr_t) (base + reg), data);
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}
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static int uart8250_mem_can_tx_byte(void *base)
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{
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return uart8250_read(base, UART8250_LSR) & UART8250_LSR_THRE;
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}
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static void uart8250_mem_tx_byte(void *base, unsigned char data)
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{
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unsigned long int i = SINGLE_CHAR_TIMEOUT;
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while(i-- && !uart8250_mem_can_tx_byte(base_port))
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while(i-- && !uart8250_mem_can_tx_byte(base))
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udelay(1);
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write8(base_port + UART8250_TBR, data);
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uart8250_write(base, UART8250_TBR, data);
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}
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static void uart8250_mem_tx_flush(unsigned base_port)
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static void uart8250_mem_tx_flush(void *base)
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{
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unsigned long int i = FIFO_TIMEOUT;
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while(i-- && !(read8(base_port + UART8250_LSR) & UART8250_LSR_TEMT))
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while(i-- && !(uart8250_read(base, UART8250_LSR) & UART8250_LSR_TEMT))
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udelay(1);
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}
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static int uart8250_mem_can_rx_byte(unsigned base_port)
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static int uart8250_mem_can_rx_byte(void *base)
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{
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return read8(base_port + UART8250_LSR) & UART8250_LSR_DR;
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return uart8250_read(base, UART8250_LSR) & UART8250_LSR_DR;
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}
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static unsigned char uart8250_mem_rx_byte(unsigned base_port)
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static unsigned char uart8250_mem_rx_byte(void *base)
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{
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unsigned long int i = SINGLE_CHAR_TIMEOUT;
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while(i-- && !uart8250_mem_can_rx_byte(base_port))
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while(i-- && !uart8250_mem_can_rx_byte(base))
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udelay(1);
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if (i)
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return read8(base_port + UART8250_RBR);
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return uart8250_read(base, UART8250_RBR);
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else
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return 0x0;
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}
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static void uart8250_mem_init(unsigned base_port, unsigned divisor)
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static void uart8250_mem_init(void *base, unsigned divisor)
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{
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/* Disable interrupts */
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write8(base_port + UART8250_IER, 0x0);
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uart8250_write(base, UART8250_IER, 0x0);
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/* Enable FIFOs */
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write8(base_port + UART8250_FCR, UART8250_FCR_FIFO_EN);
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uart8250_write(base, UART8250_FCR, UART8250_FCR_FIFO_EN);
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/* Assert DTR and RTS so the other end is happy */
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write8(base_port + UART8250_MCR, UART8250_MCR_DTR | UART8250_MCR_RTS);
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uart8250_write(base, UART8250_MCR, UART8250_MCR_DTR | UART8250_MCR_RTS);
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/* DLAB on */
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write8(base_port + UART8250_LCR, UART8250_LCR_DLAB | CONFIG_TTYS0_LCS);
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uart8250_write(base, UART8250_LCR, UART8250_LCR_DLAB | CONFIG_TTYS0_LCS);
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write8(base_port + UART8250_DLL, divisor & 0xFF);
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write8(base_port + UART8250_DLM, (divisor >> 8) & 0xFF);
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uart8250_write(base, UART8250_DLL, divisor & 0xFF);
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uart8250_write(base, UART8250_DLM, (divisor >> 8) & 0xFF);
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/* Set to 3 for 8N1 */
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write8(base_port + UART8250_LCR, CONFIG_TTYS0_LCS);
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uart8250_write(base, UART8250_LCR, CONFIG_TTYS0_LCS);
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}
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void uart_init(int idx)
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{
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u32 base = uart_platform_base(idx);
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void *base = uart_platform_baseptr(idx);
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if (!base)
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return;
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@ -102,7 +113,7 @@ void uart_init(int idx)
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void uart_tx_byte(int idx, unsigned char data)
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{
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u32 base = uart_platform_base(idx);
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void *base = uart_platform_baseptr(idx);
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if (!base)
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return;
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uart8250_mem_tx_byte(base, data);
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@ -110,7 +121,7 @@ void uart_tx_byte(int idx, unsigned char data)
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unsigned char uart_rx_byte(int idx)
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{
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u32 base = uart_platform_base(idx);
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void *base = uart_platform_baseptr(idx);
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if (!base)
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return 0xff;
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return uart8250_mem_rx_byte(base);
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@ -118,7 +129,7 @@ unsigned char uart_rx_byte(int idx)
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void uart_tx_flush(int idx)
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{
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u32 base = uart_platform_base(idx);
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void *base = uart_platform_baseptr(idx);
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if (!base)
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return;
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uart8250_mem_tx_flush(base);
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