mb/google/rex: Use HI-556W for Proto 1 SKUs
This patch drops the UFC sensor OV2740 (reused from the Brya chassis) support for Rex and added support for Rex specific UFC sensor HI-556W. BUG=b:269499723 TEST=Verified UFC is working on google/rex Proto 1. Signed-off-by: Subrata Banik <subratabanik@google.com> Change-Id: I6b8ac08adec351a103ac1764d974db4881dc4d6e Reviewed-on: https://review.coreboot.org/c/coreboot/+/70225 Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Ivy Jian <ivy.jian@quanta.corp-partner.google.com>
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@ -414,17 +414,17 @@ chip soc/intel/meteorlake
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end
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device ref i2c5 on
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chip drivers/intel/mipi_camera
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register "acpi_hid" = ""INT3474""
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register "acpi_hid" = ""INT3537""
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register "acpi_uid" = "0"
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register "acpi_name" = ""CAM1""
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register "chip_name" = ""Ov 2740 Camera""
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register "chip_name" = ""Hi-556 Camera""
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register "device_type" = "INTEL_ACPI_CAMERA_SENSOR"
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register "has_power_resource" = "1"
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register "ssdb.lanes_used" = "2"
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register "ssdb.link_used" = "1"
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register "num_freq_entries" = "1"
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register "link_freq[0]" = "360 * MHz"
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register "link_freq[0]" = "437 * MHz"
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register "remote_name" = ""IPU0""
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register "max_dstate_for_probe" = "ACPI_DEVICE_SLEEP_D3_COLD"
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@ -432,21 +432,24 @@ chip soc/intel/meteorlake
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register "gpio_panel.gpio[0].gpio_num" = "GPP_A11" #EN_UCAM_SENR_PWR
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register "gpio_panel.gpio[1].gpio_num" = "GPP_B09" #EN_FCAM_PWR
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register "gpio_panel.gpio[2].gpio_num" = "GPP_V23" #UCAM_RST_L
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register "clk_panel.clks[0].clknum" = "IMGCLKOUT_3"
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register "clk_panel.clks[0].freq" = "FREQ_19_2_MHZ"
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#_ON
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register "on_seq.ops_cnt" = "4"
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register "on_seq.ops[0]" = "SEQ_OPS_GPIO_ENABLE(0, 0)"
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register "on_seq.ops[1]" = "SEQ_OPS_GPIO_ENABLE(1, 0)"
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register "on_seq.ops[2]" = "SEQ_OPS_GPIO_DISABLE(2, 0)"
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register "on_seq.ops[3]" = "SEQ_OPS_GPIO_ENABLE(2, 10)"
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register "on_seq.ops_cnt" = "5"
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register "on_seq.ops[0]" = "SEQ_OPS_CLK_ENABLE(0, 0)"
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register "on_seq.ops[1]" = "SEQ_OPS_GPIO_ENABLE(0, 5)"
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register "on_seq.ops[2]" = "SEQ_OPS_GPIO_ENABLE(1, 5)"
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register "on_seq.ops[3]" = "SEQ_OPS_GPIO_DISABLE(2, 5)"
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register "on_seq.ops[4]" = "SEQ_OPS_GPIO_ENABLE(2, 5)"
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#_OFF
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register "off_seq.ops_cnt" = "3"
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register "off_seq.ops[0]" = "SEQ_OPS_GPIO_DISABLE(2, 0)"
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register "off_seq.ops[1]" = "SEQ_OPS_GPIO_DISABLE(1, 0)"
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register "off_seq.ops[2]" = "SEQ_OPS_GPIO_DISABLE(0, 0)"
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device i2c 36 on
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register "off_seq.ops_cnt" = "4"
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register "off_seq.ops[0]" = "SEQ_OPS_CLK_DISABLE(0, 0)"
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register "off_seq.ops[1]" = "SEQ_OPS_GPIO_DISABLE(2, 0)"
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register "off_seq.ops[2]" = "SEQ_OPS_GPIO_DISABLE(1, 0)"
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register "off_seq.ops[3]" = "SEQ_OPS_GPIO_DISABLE(0, 0)"
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device i2c 20 on
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probe UFC UFC_MIPI
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end
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end
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