sb/intel/common: Create a common implementation of `acpi_fill_madt()`

The function `acpi_fill_madt()` is identical among all the Lynx Point
boards and sb/intel/bd82x6x, so share a common function between them.

Earlier Intel platforms have similar implementations of this function.
The common implementation might only need minor alterations to support
them.

Tested on an ASRock H81M-HDS and Google Peppy (variant of Slippy). No
issues arose from this patch.

Change-Id: Ife9e3917febf43d8a92cac66b502e2dee8527556
Signed-off-by: Tristan Corrick <tristan@corrick.kiwi>
Reviewed-on: https://review.coreboot.org/29388
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
Tristan Corrick 2018-10-31 02:28:32 +13:00 committed by Nico Huber
parent 98fb1bfa90
commit 167a512d84
9 changed files with 8 additions and 60 deletions

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@ -78,21 +78,3 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
acpi_update_thermal_table(gnvs);
}
unsigned long acpi_fill_madt(unsigned long current)
{
/* Local APICs */
current = acpi_create_madt_lapics(current);
/* IOAPIC */
current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current,
2, IO_APIC_ADDR, 0);
/* INT_SRC_OVR */
current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
current, 0, 0, 2, 0);
current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
current, 0, 9, 9, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_HIGH);
return current;
}

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@ -62,21 +62,3 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
acpi_update_thermal_table(gnvs);
}
unsigned long acpi_fill_madt(unsigned long current)
{
/* Local APICs */
current = acpi_create_madt_lapics(current);
/* IOAPIC */
current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current,
2, IO_APIC_ADDR, 0);
/* INT_SRC_OVR */
current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
current, 0, 0, 2, 0);
current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
current, 0, 9, 9, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_HIGH);
return current;
}

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@ -80,21 +80,3 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
acpi_update_thermal_table(gnvs);
}
unsigned long acpi_fill_madt(unsigned long current)
{
/* Local APICs */
current = acpi_create_madt_lapics(current);
/* IOAPIC */
current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current,
2, IO_APIC_ADDR, 0);
/* INT_SRC_OVR */
current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
current, 0, 0, 2, 0);
current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
current, 0, 9, 9, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_HIGH);
return current;
}

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@ -41,6 +41,7 @@ config SOUTH_BRIDGE_OPTIONS # dummy
select RTC
select HAVE_INTEL_CHIPSET_LOCKDOWN
select SOUTHBRIDGE_INTEL_COMMON_SMM
select SOUTHBRIDGE_INTEL_COMMON_ACPI_MADT
config EHCI_BAR
hex

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@ -47,6 +47,6 @@ else
romstage-y += early_me_mrc.c early_usb_mrc.c
endif
ramstage-y += madt.c early_pch_common.c
ramstage-y += early_pch_common.c
endif

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@ -30,6 +30,9 @@ config HAVE_INTEL_CHIPSET_LOCKDOWN
config SOUTHBRIDGE_INTEL_COMMON_SMM
def_bool n
config SOUTHBRIDGE_INTEL_COMMON_ACPI_MADT
bool
config INTEL_DESCRIPTOR_MODE_CAPABLE
def_bool n
help

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@ -52,4 +52,6 @@ ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ) += rcba_pirq.c
ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM) += pmutil.c smi.c
smm-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM) += pmutil.c smihandler.c
ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_ACPI_MADT) += madt.c
endif

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@ -13,13 +13,8 @@
* GNU General Public License for more details.
*/
#include <types.h>
#include <string.h>
#include <cbmem.h>
#include <console/console.h>
#include <arch/acpi.h>
#include <arch/ioapic.h>
#include <arch/acpigen.h>
#include <arch/smp/mpspec.h>
unsigned long acpi_fill_madt(unsigned long current)

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@ -24,6 +24,7 @@ config SOUTH_BRIDGE_OPTIONS # dummy
select SOUTHBRIDGE_INTEL_COMMON
select SOUTHBRIDGE_INTEL_COMMON_SMBUS
select SOUTHBRIDGE_INTEL_COMMON_SPI
select SOUTHBRIDGE_INTEL_COMMON_ACPI_MADT
select IOAPIC
select HAVE_USBDEBUG_OPTIONS
select USE_WATCHDOG_ON_BOOT