mb/google/zork/var/morphius: Enable support for garaged stylus

This change adds support for pen insert/eject operations in S0 and
wake on pen eject from S3 for morphius.

BUG=b:158814699,b:158719244

Change-Id: I3530a0aa83ec69559436687205c64524b862799b
Signed-off-by: Kevin Chiu <kevin.chiu@quanta.corp-partner.google.com>
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42950
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Furquan Shaikh 2020-06-30 16:13:47 -07:00
parent ffc2e75362
commit 16868bcaa2
3 changed files with 14 additions and 1 deletions

View File

@ -15,6 +15,7 @@ config BOARD_SPECIFIC_OPTIONS
select VGA_BIOS
select BOARD_ROMSIZE_KB_16384
select DISABLE_SPI_FLASH_ROM_SHARING
select DRIVERS_GENERIC_GPIO_KEYS
select DRIVERS_I2C_GENERIC
select DRIVERS_I2C_HID
select EC_GOOGLE_CHROMEEC

View File

@ -72,7 +72,7 @@ static const struct soc_amd_gpio gpio_set_stage_ram[] = {
/* PCIE_WAKE_L */
PAD_NF(GPIO_2, WAKE_L, PULL_UP),
/* PEN_DETECT_ODL */
PAD_GPI(GPIO_4, PULL_UP),
PAD_WAKE(GPIO_4, PULL_NONE, EDGE_HIGH, S3),
/* PEN_POWER_EN - Enabled*/
PAD_GPO(GPIO_5, HIGH),
/* FPMCU_INT_L */

View File

@ -79,6 +79,18 @@ chip soc/amd/picasso
register "hid_desc_reg_offset" = "0x01"
device i2c 5d on end
end
chip drivers/generic/gpio_keys
register "name" = ""PENH""
register "gpio" = "ACPI_GPIO_INPUT_ACTIVE_LOW(GPIO_4)"
register "key.dev_name" = ""EJCT""
register "key.wakeup_event_action" = "EV_ACT_DEASSERTED"
register "key.linux_code" = "SW_PEN_INSERTED"
register "key.linux_input_type" = "EV_SW"
register "key.label" = ""pen_eject""
register "key.debounce_interval" = "100"
register "key.wakeup_route" = "WAKEUP_ROUTE_GPIO_IRQ"
device generic 0 on end
end
end
device mmio 0xfedca000 on