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intel/fsp1_1: Drop `boot_mode` from `pei_data` 

It was only used locally.

Change-Id: Iaaad760e8ceca62655f5448c30846cf11959e8e1
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32588
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
This commit is contained in:
Nico Huber 2019-05-04 16:29:17 +02:00 committed by Patrick Georgi
parent a842d3ee6a
commit 16895c529c
4 changed files with 5 additions and 9 deletions
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5
src/drivers/intel/fsp1_1/raminit.c
View File

@ -28,6 +28,7 @@
void raminit(struct romstage_params *params) void raminit(struct romstage_params *params)
{ {
const bool s3wake = params->power_state->prev_sleep_state == ACPI_S3;
const EFI_GUID bootldr_tolum_guid = FSP_BOOTLOADER_TOLUM_HOB_GUID; const EFI_GUID bootldr_tolum_guid = FSP_BOOTLOADER_TOLUM_HOB_GUID;
EFI_HOB_RESOURCE_DESCRIPTOR *cbmem_root; EFI_HOB_RESOURCE_DESCRIPTOR *cbmem_root;
FSP_INFO_HEADER *fsp_header; FSP_INFO_HEADER *fsp_header;
@ -81,7 +82,7 @@ void raminit(struct romstage_params *params)
/* Zero fill RT Buffer data and start populating fields. */ /* Zero fill RT Buffer data and start populating fields. */
memset(&fsp_rt_common_buffer, 0, sizeof(fsp_rt_common_buffer)); memset(&fsp_rt_common_buffer, 0, sizeof(fsp_rt_common_buffer));
pei_ptr = params->pei_data; pei_ptr = params->pei_data;
if (pei_ptr->boot_mode == ACPI_S3) { if (s3wake) {
fsp_rt_common_buffer.BootMode = BOOT_ON_S3_RESUME; fsp_rt_common_buffer.BootMode = BOOT_ON_S3_RESUME;
} else if (pei_ptr->saved_data != NULL) { } else if (pei_ptr->saved_data != NULL) {
fsp_rt_common_buffer.BootMode = fsp_rt_common_buffer.BootMode =
@ -158,7 +159,7 @@ void raminit(struct romstage_params *params)
/* Migrate CAR data */ /* Migrate CAR data */
printk(BIOS_DEBUG, "0x%p: cbmem_top\n", cbmem_top()); printk(BIOS_DEBUG, "0x%p: cbmem_top\n", cbmem_top());
if (pei_ptr->boot_mode != ACPI_S3) { if (!s3wake) {
cbmem_initialize_empty_id_size(CBMEM_ID_FSP_RESERVED_MEMORY, cbmem_initialize_empty_id_size(CBMEM_ID_FSP_RESERVED_MEMORY,
fsp_reserved_bytes); fsp_reserved_bytes);
} else if (cbmem_initialize_id_size(CBMEM_ID_FSP_RESERVED_MEMORY, } else if (cbmem_initialize_id_size(CBMEM_ID_FSP_RESERVED_MEMORY,

5
src/drivers/intel/fsp1_1/romstage.c
View File

@ -101,7 +101,6 @@ void romstage_common(struct romstage_params *params)
timestamp_add_now(TS_BEFORE_INITRAM); timestamp_add_now(TS_BEFORE_INITRAM);
pei_data = params->pei_data; pei_data = params->pei_data;
pei_data->boot_mode = params->power_state->prev_sleep_state;
s3wake = params->power_state->prev_sleep_state == ACPI_S3; s3wake = params->power_state->prev_sleep_state == ACPI_S3;
if (CONFIG(ELOG_BOOT_COUNT) && !s3wake) if (CONFIG(ELOG_BOOT_COUNT) && !s3wake)
@ -129,7 +128,7 @@ void romstage_common(struct romstage_params *params)
params->pei_data->saved_data = rdev_mmap_full(&rdev); params->pei_data->saved_data = rdev_mmap_full(&rdev);
/* Assume boot device is memory mapped. */ /* Assume boot device is memory mapped. */
assert(CONFIG(BOOT_DEVICE_MEMORY_MAPPED)); assert(CONFIG(BOOT_DEVICE_MEMORY_MAPPED));
} else if (params->pei_data->boot_mode == ACPI_S3) { } else if (s3wake) {
/* Waking from S3 and no cache. */ /* Waking from S3 and no cache. */
printk(BIOS_DEBUG, printk(BIOS_DEBUG,
"No MRC cache found in S3 resume path.\n"); "No MRC cache found in S3 resume path.\n");
@ -149,7 +148,7 @@ void romstage_common(struct romstage_params *params)
if (CONFIG(CACHE_MRC_SETTINGS)) { if (CONFIG(CACHE_MRC_SETTINGS)) {
printk(BIOS_DEBUG, "MRC data at %p %d bytes\n", printk(BIOS_DEBUG, "MRC data at %p %d bytes\n",
pei_data->data_to_save, pei_data->data_to_save_size); pei_data->data_to_save, pei_data->data_to_save_size);
if ((params->pei_data->boot_mode != ACPI_S3) if (!s3wake
&& (params->pei_data->data_to_save_size != 0) && (params->pei_data->data_to_save_size != 0)
&& (params->pei_data->data_to_save != NULL)) && (params->pei_data->data_to_save != NULL))
mrc_cache_stash_data(MRC_TRAINING_DATA, mrc_cache_stash_data(MRC_TRAINING_DATA,

3
src/soc/intel/braswell/include/soc/pei_data.h
View File

@ -44,9 +44,6 @@ struct pei_data {
uint8_t spd_ch0_config; uint8_t spd_ch0_config;
uint8_t spd_ch1_config; uint8_t spd_ch1_config;
/* System state information */
int boot_mode;
/* Fast boot and S3 resume MRC data */ /* Fast boot and S3 resume MRC data */
int saved_data_size; int saved_data_size;
const void *saved_data; const void *saved_data;

1
src/soc/intel/skylake/include/soc/pei_data.h
View File

@ -41,7 +41,6 @@ typedef void ABI_X86(*tx_byte_func)(unsigned char byte);
struct pei_data { struct pei_data {
uint32_t pei_version; uint32_t pei_version;
int boot_mode;
int ec_present; int ec_present;
/* Console output function */ /* Console output function */