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mb/google/sarien/variants/arcada: Adjust TP/TS/H1 I2C CLK to meet spec 

After adjustment on Arcada EVT
TouchScreen: 390 KHz
TouchPad: 389 KHz
H1: 389 KHz

BUG=b:120584026, b:120584561
BRANCH=master
TEST=emerge-sarien coreboot chromeos-bootimage
     measure by scope

Signed-off-by: Casper Chang <casper_chang@wistron.corp-partner.google.com>
Change-Id: Ia6eb332e7a664b211a5025ad07e0d01bf7f8d5bb
Reviewed-on: https://review.coreboot.org/c/31124
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lijian Zhao <lijian.zhao@intel.com>
This commit is contained in:
Casper Chang 2019-01-28 21:29:01 +08:00 committed by Patrick Georgi
parent 76c7688f63
commit 168f046d71
1 changed files with 6 additions and 4 deletions
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10
src/mainboard/google/sarien/variants/arcada/devicetree.cb
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@ -77,17 +77,19 @@ chip soc/intel/cannonlake
.chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT,
.i2c[0] = {
.speed = I2C_SPEED_FAST,
.rise_time_ns = 52,
.fall_time_ns = 110,
},
.i2c[1] = {
.speed = I2C_SPEED_FAST,
.rise_time_ns = 176,
.fall_time_ns = 15,
.rise_time_ns = 52,
.fall_time_ns = 110,
},
.i2c[4] = {
.early_init = 1,
.speed = I2C_SPEED_FAST,
.rise_time_ns = 452,
.fall_time_ns = 110,
.rise_time_ns = 36,
.fall_time_ns = 99,
},
}"