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mb/google/puff: Enable HECI communication 

Set HeciEnabled = 1 on puff device tree to turn on
Intel ME communication interface.

BUG=b:143232330
BRANCH=None
TEST=Build puff and boot up OS.
     ran lspci and confirmed there is a HECI device.
     00:16.0 Communication controller: Intel Corporation Device 02e0

Change-Id: I2debb885022ae31e395869d014a91824b5dd980c
Signed-off-by: Jamie Chen <jamie.chen@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38676
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
This commit is contained in:
Jamie Chen 2020-02-03 17:39:44 +08:00 committed by Patrick Georgi
parent bd3c1c7dd8
commit 16a23c0e10
1 changed files with 2 additions and 0 deletions
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2
src/mainboard/google/hatch/variants/puff/overridetree.cb
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@ -1,4 +1,6 @@
chip soc/intel/cannonlake chip soc/intel/cannonlake
# Enable heci communication
register "HeciEnabled" = "1"
register "SerialIoDevMode" = "{ register "SerialIoDevMode" = "{
[PchSerialIoIndexI2C0] = PchSerialIoDisabled, [PchSerialIoIndexI2C0] = PchSerialIoDisabled,