cpu/amd/family_10h-family_15h: Apply missing Family 15h errata fixes
Change-Id: I132874fe5b5a8b9a87422e2f07bff03bc5863ca4 Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Reviewed-on: https://review.coreboot.org/12065 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins)
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@ -162,6 +162,14 @@ static const struct {
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0x0000000C, 0x00000000,
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0x0000000C, 0x00000000}, /* Cx and Dx multiple-link processor */
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{ OSVW_ID_Length, AMD_FAM15_ALL, AMD_PTYPE_ALL,
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0x00000005, 0x00000000,
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0x0000ffff, 0x00000000}, /* OSVW_ID_Length = 0x5 */
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{ OSVW_Status, AMD_FAM15_ALL, AMD_PTYPE_ALL,
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0x00000010, 0x00000000,
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0xffffffff, 0x00000000}, /* OsvwId4 = 0x1 */
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{ BU_CFG2, AMD_DR_Dx, AMD_PTYPE_ALL,
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0x00000000, 1 << (50-32),
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0x00000000, 1 << (50-32)}, /* D0 or Above, RdMmExtCfgQwEn*/
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@ -621,6 +629,10 @@ static const struct {
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{ 3, 0x1b8, (AMD_FAM10_ALL | AMD_FAM15_ALL), AMD_PTYPE_ALL,
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0x00001000, 0x00001000 }, /* [12] = L3PrivReplEn */
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/* Errata 504 workaround */
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{ 3, 0x1b8, AMD_FAM15_ALL, AMD_PTYPE_ALL,
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0x00040000, 0x00040000 }, /* [18] = 1b */
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/* IBS Control Register */
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{ 3, 0x1cc, (AMD_FAM10_ALL | AMD_FAM15_ALL), AMD_PTYPE_ALL,
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0x00000100, 0x00000100 }, /* [8] = LvtOffsetVal */
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@ -75,6 +75,7 @@ static void mcf3_read_resources(device_t dev)
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static void set_agp_aperture(device_t dev, uint32_t pci_id)
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{
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uint32_t dword;
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struct resource *resource;
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resource = probe_resource(dev, 0x94);
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@ -105,6 +106,11 @@ static void set_agp_aperture(device_t dev, uint32_t pci_id)
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/* Report the resource has been stored... */
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report_resource_stored(pdev, resource, " <gart>");
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/* Errata 540 workaround */
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dword = pci_read_config32(pdev, 0x90);
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dword |= 0x1 << 6; /* DisGartTblWlkPrb = 0x1 */
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pci_write_config32(pdev, 0x90, dword);
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}
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}
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}
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