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baytrail: fix nvs offsets 

The VDAT data was off by 2 bytes when reading it from the
kernel. The reason is that the header did not line up
correctly with actual ACPI code.

BUG=chrome-os-partner:24440
BRANCH=None
TEST=crossystem devsw_cur now returns either 0 or 1 depending
     on state.

Change-Id: Ie78599f29cd5daf7da98db5e37fa276d24339f6a
Signed-off-by: Aaron durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/179372
Reviewed-on: http://review.coreboot.org/4996
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins)
This commit is contained in:
Aaron Durbin 2013-12-09 15:03:34 -08:00 committed by Kyösti Mälkki
parent 7538937d6e
commit 16cc9c9599
1 changed files with 2 additions and 2 deletions
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4
src/soc/intel/baytrail/baytrail/nvs.h
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@ -50,12 +50,12 @@ typedef struct {
u32 cmem; /* 0x30 - CBMEM TOC */ u32 cmem; /* 0x30 - CBMEM TOC */
u32 tolm; /* 0x34 - Top of Low Memory */ u32 tolm; /* 0x34 - Top of Low Memory */
u32 cbmc; /* 0x38 - coreboot memconsole */ u32 cbmc; /* 0x38 - coreboot memconsole */
u8 rsvd5[39]; u8 rsvd5[36];
/* Serial IO device BARs */ /* Serial IO device BARs */
u32 s0b[8]; /* 0x60 - 0x7f - BAR0 */ u32 s0b[8]; /* 0x60 - 0x7f - BAR0 */
u32 s1b[8]; /* 0x80 - 0x9f - BAR1 */ u32 s1b[8]; /* 0x80 - 0x9f - BAR1 */
u8 rsvd6[95]; u8 rsvd6[96];
/* ChromeOS specific (starts at 0x100)*/ /* ChromeOS specific (starts at 0x100)*/
chromeos_acpi_t chromeos; chromeos_acpi_t chromeos;