This patch gets usbdebug console working in romstage.
- actually hook up usbdebug in printk/print_ for romstage - make usbdebug.c more similar to the Linux kernel version it was originally derived from. - increase retries and timing for usbdebug init (at least one chipset seems to need this) - src/pc80/usbdebug_serial.c is not needed - some small console cleanups Signed-off-by: Stefan Reinauer <reinauer@google.com> Acked-by: Patrick Georgi <patrick.georgi@secunet.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6315 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
parent
36ade67007
commit
16ce01b0d8
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@ -19,23 +19,30 @@
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#include <console/console.h>
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#include <console/vtxprintf.h>
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#if CONFIG_CONSOLE_SERIAL8250
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#include <uart8250.h>
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#endif
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#if CONFIG_USBDEBUG
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#include <usbdebug.h>
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#endif
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#if CONFIG_CONSOLE_NE2K
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#include <console/ne2k.h>
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#endif
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static void console_tx_byte(unsigned char byte)
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{
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if (byte == '\n')
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console_tx_byte('\r');
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#if CONFIG_CONSOLE_SERIAL8250
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uart8250_tx_byte(CONFIG_TTYS0_BASE, byte);
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#endif
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#if CONFIG_USBDEBUG
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usbdebug_tx_byte(byte);
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#endif
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#if CONFIG_CONSOLE_NE2K
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#ifdef __PRE_RAM__
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ne2k_append_data(&byte, 1, CONFIG_CONSOLE_NE2K_IO_PORT);
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#endif
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#endif
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if (byte == '\n')
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uart8250_tx_byte(CONFIG_TTYS0_BASE, '\r');
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uart8250_tx_byte(CONFIG_TTYS0_BASE, byte);
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}
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int do_printk(int msg_level, const char *fmt, ...)
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@ -149,6 +149,7 @@ int do_printk(int msg_level, const char *fmt, ...) __attribute__((format(printf,
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#define print_info_hex32(HEX) printk(BIOS_INFO, "%08x", (HEX))
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#define print_debug_hex32(HEX) printk(BIOS_DEBUG, "%08x", (HEX))
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#define print_spew_hex32(HEX) printk(BIOS_SPEW, "%08x", (HEX))
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#else
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/* __ROMCC__ */
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@ -357,9 +358,6 @@ static void print_spew(const char *str) { __console_tx_string(BIOS_SPEW, str); }
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#define print_spew_hex32(HEX) __console_tx_hex32(BIOS_SPEW, HEX)
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#endif
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#endif
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#ifdef __ROMCC__
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/* if included by romcc, include the sources, too. romcc can't use prototypes */
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#include <console/console.c>
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#include <console/post.c>
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@ -27,22 +27,18 @@ struct ehci_debug_info {
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void *ehci_caps;
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void *ehci_regs;
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void *ehci_debug;
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unsigned devnum;
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unsigned endpoint_out;
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unsigned endpoint_in;
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u32 devnum;
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u32 endpoint_out;
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u32 endpoint_in;
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};
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int dbgp_bulk_write_x(struct ehci_debug_info *dbg_info, const char *bytes, int size);
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int dbgp_bulk_read_x(struct ehci_debug_info *dbg_info, void *data, int size);
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int dbgp_control_msg(struct ehci_dbg_port *ehci_debug, unsigned devnum, int requesttype, int request,
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int value, int index, void *data, int size);
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int ehci_wait_for_port(struct ehci_regs *ehci_regs, int port);
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void set_ehci_base(unsigned ehci_base);
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void set_ehci_debug(unsigned ehci_deug);
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void set_ehci_debug(unsigned ehci_debug);
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unsigned get_ehci_debug(void);
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void set_debug_port(unsigned port);
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void early_usbdebug_init(void);
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void usbdebug_ram_tx_byte(unsigned char data);
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int early_usbdebug_init(void);
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void usbdebug_tx_byte(unsigned char data);
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#endif
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@ -26,8 +26,10 @@ romstage-$(CONFIG_CACHE_AS_RAM) += ramtest.c
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#romstage-y += lzmadecode.c
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romstage-$(CONFIG_CONSOLE_NE2K) += ne2k.c
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romstage-$(CONFIG_CONSOLE_NE2K) += compute_ip_checksum.c
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driver-$(CONFIG_CONSOLE_NE2K) += ne2k.c
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romstage-$(CONFIG_USBDEBUG) += usbdebug.c
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ramstage-$(CONFIG_USBDEBUG) += usbdebug.c
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ramstage-$(CONFIG_BOOTSPLASH) += jpeg.c
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@ -2,6 +2,7 @@
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2006 Eric Biederman (ebiederm@xmission.com)
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* Copyright (C) 2007 AMD
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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@ -17,20 +18,24 @@
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA
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*/
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#if !defined(__ROMCC__)
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#include <stddef.h>
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#include <console/console.h>
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#else
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#if CONFIG_CACHE_AS_RAM==0
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#define printk(BIOS_DEBUG, fmt, arg...) do {} while(0)
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#endif
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#endif
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#include <arch/io.h>
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#include <arch/byteorder.h>
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#include <usb_ch9.h>
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#include <ehci.h>
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#include <usbdebug.h>
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// Does not work if we want early printk to do usb debug, too..
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#define DBGP_DEBUG 0
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#if DBGP_DEBUG
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# define dbgp_printk(fmt_arg...) printk(BIOS_DEBUG, fmt_arg)
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#else
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#define dbgp_printk(fmt_arg...) do {} while(0)
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#endif
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#define USB_DEBUG_DEVNUM 127
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#define DBGP_DATA_TOGGLE 0x8800
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@ -78,16 +83,18 @@
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static int dbgp_wait_until_complete(struct ehci_dbg_port *ehci_debug)
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{
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unsigned ctrl;
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u32 ctrl;
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int loop = 0x100000;
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do {
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ctrl = read32((unsigned long)&ehci_debug->control);
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/* Stop when the transaction is finished */
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if (ctrl & DBGP_DONE)
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break;
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} while(--loop>0);
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} while (--loop > 0);
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if (!loop) return -1000;
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if (!loop)
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return -1;
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/* Now that we have observed the completed transaction,
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* clear the done bit.
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return (ctrl & DBGP_ERROR) ? -DBGP_ERRCODE(ctrl) : DBGP_LEN(ctrl);
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}
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static void dbgp_mdelay(int ms)
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{
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int i;
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while (ms--) {
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for (i = 0; i < 1000; i++)
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inb(0x80);
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}
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}
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static void dbgp_breath(void)
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{
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/* Sleep to give the debug port a chance to breathe */
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static int dbgp_wait_until_done(struct ehci_dbg_port *ehci_debug, unsigned ctrl)
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{
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unsigned pids, lpid;
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u32 pids, lpid;
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int ret;
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int loop = 3;
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retry:
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write32((unsigned long)&ehci_debug->control, ctrl | DBGP_GO);
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ret = dbgp_wait_until_complete(ehci_debug);
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/* If I get a NACK reissue the transmission */
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if (lpid == USB_PID_NAK) {
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if (--loop > 0) goto retry;
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if (--loop > 0)
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goto retry;
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}
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return ret;
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static void dbgp_set_data(struct ehci_dbg_port *ehci_debug, const void *buf, int size)
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{
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const unsigned char *bytes = buf;
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unsigned lo, hi;
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u32 lo, hi;
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int i;
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lo = hi = 0;
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for (i = 0; i < 4 && i < size; i++)
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lo |= bytes[i] << (8*i);
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static void dbgp_get_data(struct ehci_dbg_port *ehci_debug, void *buf, int size)
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{
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unsigned char *bytes = buf;
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unsigned lo, hi;
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u32 lo, hi;
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int i;
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lo = read32((unsigned long)&ehci_debug->data03);
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hi = read32((unsigned long)&ehci_debug->data47);
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for (i = 0; i < 4 && i < size; i++)
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bytes[i] = (hi >> (8*(i - 4))) & 0xff;
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}
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static int dbgp_bulk_write(struct ehci_dbg_port *ehci_debug, unsigned devnum, unsigned endpoint, const char *bytes, int size)
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static int dbgp_bulk_write(struct ehci_dbg_port *ehci_debug,
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unsigned devnum, unsigned endpoint, const char *bytes, int size)
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{
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unsigned pids, addr, ctrl;
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u32 pids, addr, ctrl;
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int ret;
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if (size > DBGP_MAX_PACKET)
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return -1;
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write32((unsigned long)&ehci_debug->pids, pids);
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ret = dbgp_wait_until_done(ehci_debug, ctrl);
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if (ret < 0) {
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return ret;
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}
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return ret;
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}
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int dbgp_bulk_write_x(struct ehci_debug_info *dbg_info, const char *bytes, int size)
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{
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return dbgp_bulk_write(dbg_info->ehci_debug, dbg_info->devnum, dbg_info->endpoint_out, bytes, size);
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return dbgp_bulk_write(dbg_info->ehci_debug, dbg_info->devnum,
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dbg_info->endpoint_out, bytes, size);
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}
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static int dbgp_bulk_read(struct ehci_dbg_port *ehci_debug, unsigned devnum, unsigned endpoint, void *data, int size)
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static int dbgp_bulk_read(struct ehci_dbg_port *ehci_debug, unsigned devnum,
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unsigned endpoint, void *data, int size)
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{
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unsigned pids, addr, ctrl;
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u32 pids, addr, ctrl;
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int ret;
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if (size > DBGP_MAX_PACKET)
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ret = dbgp_wait_until_done(ehci_debug, ctrl);
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if (ret < 0)
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return ret;
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if (size > ret)
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size = ret;
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dbgp_get_data(ehci_debug, data, size);
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return ret;
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}
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int dbgp_bulk_read_x(struct ehci_debug_info *dbg_info, void *data, int size)
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{
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return dbgp_bulk_read(dbg_info->ehci_debug, dbg_info->devnum, dbg_info->endpoint_in, data, size);
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return dbgp_bulk_read(dbg_info->ehci_debug, dbg_info->devnum,
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dbg_info->endpoint_in, data, size);
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}
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int dbgp_control_msg(struct ehci_dbg_port *ehci_debug, unsigned devnum, int requesttype, int request,
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int value, int index, void *data, int size)
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#ifdef __PRE_RAM__
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static void dbgp_mdelay(int ms)
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{
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unsigned pids, addr, ctrl;
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int i;
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while (ms--) {
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for (i = 0; i < 1000; i++)
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inb(0x80);
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}
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}
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static int dbgp_control_msg(struct ehci_dbg_port *ehci_debug, unsigned devnum, int requesttype,
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int request, int value, int index, void *data, int size)
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{
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u32 pids, addr, ctrl;
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struct usb_ctrlrequest req;
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int read;
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int ret;
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read = (requesttype & USB_DIR_IN) != 0;
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if (size > (read?DBGP_MAX_PACKET:0))
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if (size > (read ? DBGP_MAX_PACKET:0))
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return -1;
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/* Compute the control message */
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req.bRequestType = requesttype;
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req.bRequest = request;
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req.wValue = value;
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req.wIndex = index;
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req.wLength = size;
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req.wValue = cpu_to_le16(value);
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req.wIndex = cpu_to_le16(index);
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req.wLength = cpu_to_le16(size);
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pids = DBGP_PID_SET(USB_PID_DATA0, USB_PID_SETUP);
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addr = DBGP_EPADDR(devnum, 0);
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@ -275,8 +292,8 @@ int dbgp_control_msg(struct ehci_dbg_port *ehci_debug, unsigned devnum, int requ
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static int ehci_reset_port(struct ehci_regs *ehci_regs, int port)
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{
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unsigned portsc;
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unsigned delay_time, delay_ms;
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u32 portsc;
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u32 delay_time, delay_ms;
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int loop;
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/* Reset the usb debug port */
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@ -308,23 +325,24 @@ static int ehci_reset_port(struct ehci_regs *ehci_regs, int port)
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/* Device went away? */
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if (!(portsc & PORT_CONNECT))
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return -107;//-ENOTCONN;
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return -1; //-ENOTCONN;
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/* bomb out completely if something weird happend */
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if ((portsc & PORT_CSC))
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return -22;//-EINVAL;
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return -2; //-EINVAL;
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/* If we've finished resetting, then break out of the loop */
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if (!(portsc & PORT_RESET) && (portsc & PORT_PE))
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return 0;
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}
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return -16;//-EBUSY;
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return -3; //-EBUSY;
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}
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int ehci_wait_for_port(struct ehci_regs *ehci_regs, int port)
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static int ehci_wait_for_port(struct ehci_regs *ehci_regs, int port)
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{
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unsigned status;
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u32 status;
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int ret, reps;
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for (reps = 0; reps < 3; reps++) {
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dbgp_mdelay(100);
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status = read32((unsigned long)&ehci_regs->status);
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@ -334,44 +352,33 @@ int ehci_wait_for_port(struct ehci_regs *ehci_regs, int port)
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return 0;
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}
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}
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return -107; //-ENOTCONN;
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return -1; //-ENOTCONN;
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}
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#define DBGP_DEBUG 1
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#if DBGP_DEBUG
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# define dbgp_printk(fmt_arg...) printk(BIOS_DEBUG, fmt_arg)
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#else
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#define dbgp_printk(fmt_arg...) do {} while(0)
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#endif
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#ifdef __PRE_RAM__
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static void usbdebug_init(unsigned ehci_bar, unsigned offset, struct ehci_debug_info *info)
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static int usbdebug_init(unsigned ehci_bar, unsigned offset, struct ehci_debug_info *info)
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{
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struct ehci_caps *ehci_caps;
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struct ehci_regs *ehci_regs;
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struct ehci_dbg_port *ehci_debug;
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unsigned dbgp_endpoint_out;
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unsigned dbgp_endpoint_in;
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struct usb_debug_descriptor dbgp_desc;
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unsigned ctrl, devnum;
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int ret;
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u32 cmd, ctrl, status, portsc, hcs_params;
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u32 debug_port, new_debug_port = 0, n_ports;
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u32 devnum;
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int ret, i;
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int loop;
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unsigned cmd, status, portsc, hcs_params, debug_port, n_ports, new_debug_port;
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int i;
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unsigned port_map_tried;
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unsigned playtimes = 3;
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int port_map_tried;
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int playtimes = 3;
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ehci_caps = (struct ehci_caps *)ehci_bar;
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ehci_regs = (struct ehci_regs *)(ehci_bar + HC_LENGTH(read32((unsigned long)&ehci_caps->hc_capbase)));
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ehci_regs = (struct ehci_regs *)(ehci_bar +
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HC_LENGTH(read32((unsigned long)&ehci_caps->hc_capbase)));
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ehci_debug = (struct ehci_dbg_port *)(ehci_bar + offset);
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info->ehci_debug = (void *)0;
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new_debug_port = 0;
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try_next_time:
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port_map_tried = 0;
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@ -384,34 +391,36 @@ try_next_port:
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dbgp_printk("debug_port: %d\n", debug_port);
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dbgp_printk("n_ports: %d\n", n_ports);
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#if 1
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for (i = 1; i <= n_ports; i++) {
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portsc = read32((unsigned long)&ehci_regs->port_status[i-1]);
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dbgp_printk("PORTSC #%d: %08x\n", i, portsc);
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}
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#endif
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if(port_map_tried && (new_debug_port!=debug_port)) {
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if(port_map_tried && (new_debug_port != debug_port)) {
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if(--playtimes) {
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set_debug_port(debug_port);
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goto try_next_time;
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}
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return;
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return -1;
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}
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loop = 100;
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/* Reset the EHCI controller */
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loop = 10;
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cmd = read32((unsigned long)&ehci_regs->command);
|
||||
cmd |= CMD_RESET;
|
||||
write32((unsigned long)&ehci_regs->command, cmd);
|
||||
do {
|
||||
dbgp_mdelay(10);
|
||||
cmd = read32((unsigned long)&ehci_regs->command);
|
||||
} while ((cmd & CMD_RESET) && (--loop > 0));
|
||||
|
||||
if(!loop)
|
||||
if(!loop) {
|
||||
dbgp_printk("Could not reset EHCI controller.\n");
|
||||
else
|
||||
// on some systems it works without succeeding here.
|
||||
// return -2;
|
||||
} else {
|
||||
dbgp_printk("EHCI controller reset successfully.\n");
|
||||
}
|
||||
|
||||
/* Claim ownership, but do not enable yet */
|
||||
ctrl = read32((unsigned long)&ehci_debug->control);
|
||||
|
@ -419,7 +428,7 @@ try_next_port:
|
|||
ctrl &= ~(DBGP_ENABLED | DBGP_INUSE);
|
||||
write32((unsigned long)&ehci_debug->control, ctrl);
|
||||
|
||||
/* Start the ehci running */
|
||||
/* Start EHCI controller */
|
||||
cmd = read32((unsigned long)&ehci_regs->command);
|
||||
cmd &= ~(CMD_LRESET | CMD_IAAD | CMD_PSE | CMD_ASE | CMD_RESET);
|
||||
cmd |= CMD_RUN;
|
||||
|
@ -431,12 +440,13 @@ try_next_port:
|
|||
/* Wait until the controller is no longer halted */
|
||||
loop = 10;
|
||||
do {
|
||||
dbgp_mdelay(10);
|
||||
status = read32((unsigned long)&ehci_regs->status);
|
||||
} while ((status & STS_HALT) && (--loop>0));
|
||||
} while ((status & STS_HALT) && (--loop > 0));
|
||||
|
||||
if(!loop) {
|
||||
dbgp_printk("EHCI could not be started.\n");
|
||||
return;
|
||||
return -3;
|
||||
}
|
||||
dbgp_printk("EHCI started.\n");
|
||||
|
||||
|
@ -456,6 +466,7 @@ try_next_port:
|
|||
if ((ctrl & DBGP_CLAIM) != DBGP_CLAIM) {
|
||||
dbgp_printk("No device in EHCI debug port.\n");
|
||||
write32((unsigned long)&ehci_debug->control, ctrl & ~DBGP_CLAIM);
|
||||
ret = -4;
|
||||
goto err;
|
||||
}
|
||||
dbgp_printk("EHCI debug port enabled.\n");
|
||||
|
@ -478,10 +489,12 @@ try_next_port:
|
|||
}
|
||||
if (devnum > 127) {
|
||||
dbgp_printk("Could not find attached debug device.\n");
|
||||
ret = -5;
|
||||
goto err;
|
||||
}
|
||||
if (ret < 0) {
|
||||
dbgp_printk("Attached device is not a debug device.\n");
|
||||
ret = -6;
|
||||
goto err;
|
||||
}
|
||||
dbgp_endpoint_out = dbgp_desc.bDebugOutEndpoint;
|
||||
|
@ -491,10 +504,11 @@ try_next_port:
|
|||
if (devnum != USB_DEBUG_DEVNUM) {
|
||||
ret = dbgp_control_msg(ehci_debug, devnum,
|
||||
USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE,
|
||||
USB_REQ_SET_ADDRESS, USB_DEBUG_DEVNUM, 0, (void *)0, 0);
|
||||
USB_REQ_SET_ADDRESS, USB_DEBUG_DEVNUM, 0, NULL, 0);
|
||||
if (ret < 0) {
|
||||
dbgp_printk("Could not move attached device to %d.\n",
|
||||
USB_DEBUG_DEVNUM);
|
||||
ret = -7;
|
||||
goto err;
|
||||
}
|
||||
devnum = USB_DEBUG_DEVNUM;
|
||||
|
@ -504,18 +518,19 @@ try_next_port:
|
|||
/* Enable the debug interface */
|
||||
ret = dbgp_control_msg(ehci_debug, USB_DEBUG_DEVNUM,
|
||||
USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE,
|
||||
USB_REQ_SET_FEATURE, USB_DEVICE_DEBUG_MODE, 0, (void *)0, 0);
|
||||
USB_REQ_SET_FEATURE, USB_DEVICE_DEBUG_MODE, 0, NULL, 0);
|
||||
if (ret < 0) {
|
||||
dbgp_printk("Could not enable EHCI debug device.\n");
|
||||
ret = -8;
|
||||
goto err;
|
||||
}
|
||||
dbgp_printk("EHCI debug interface enabled.\n");
|
||||
|
||||
/* Perform a small write to get the even/odd data state in sync
|
||||
*/
|
||||
ret = dbgp_bulk_write(ehci_debug, USB_DEBUG_DEVNUM, dbgp_endpoint_out, " ",1);
|
||||
/* Perform a small write to get the even/odd data state in sync */
|
||||
ret = dbgp_bulk_write(ehci_debug, USB_DEBUG_DEVNUM, dbgp_endpoint_out, "USB\r\n",5);
|
||||
if (ret < 0) {
|
||||
dbgp_printk("dbgp_bulk_write failed: %d\n", ret);
|
||||
ret = -9;
|
||||
goto err;
|
||||
}
|
||||
dbgp_printk("Test write done\n");
|
||||
|
@ -527,26 +542,50 @@ try_next_port:
|
|||
info->endpoint_out = dbgp_endpoint_out;
|
||||
info->endpoint_in = dbgp_endpoint_in;
|
||||
|
||||
return;
|
||||
return 0;
|
||||
err:
|
||||
/* Things didn't work so remove my claim */
|
||||
ctrl = read32((unsigned long)&ehci_debug->control);
|
||||
ctrl &= ~(DBGP_CLAIM | DBGP_OUT);
|
||||
write32((unsigned long)(unsigned long)&ehci_debug->control, ctrl);
|
||||
//return ret;
|
||||
|
||||
next_debug_port:
|
||||
port_map_tried |= (1<<(debug_port-1));
|
||||
if(port_map_tried != ((1<<n_ports) -1)) {
|
||||
new_debug_port = ((debug_port-1+1)%n_ports) + 1;
|
||||
port_map_tried |= (1 << (debug_port - 1));
|
||||
new_debug_port = ((debug_port-1 + 1) % n_ports) + 1;
|
||||
if (port_map_tried != ((1 << n_ports) - 1)) {
|
||||
set_debug_port(new_debug_port);
|
||||
goto try_next_port;
|
||||
}
|
||||
if(--playtimes) {
|
||||
if (--playtimes) {
|
||||
//set_debug_port(new_debug_port);
|
||||
set_debug_port(debug_port);
|
||||
goto try_next_time;
|
||||
}
|
||||
|
||||
return -10;
|
||||
}
|
||||
|
||||
// **** This part is probably x86 specific and used by romstage.c **** //
|
||||
|
||||
int early_usbdebug_init(void)
|
||||
{
|
||||
struct ehci_debug_info *dbg_info = (struct ehci_debug_info *)
|
||||
(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - sizeof(struct ehci_debug_info));
|
||||
|
||||
return usbdebug_init(CONFIG_EHCI_BAR, CONFIG_EHCI_DEBUG_OFFSET, dbg_info);
|
||||
}
|
||||
|
||||
void usbdebug_tx_byte(unsigned char data)
|
||||
{
|
||||
struct ehci_debug_info *dbg_info;
|
||||
|
||||
/* "Find" dbg_info structure in Cache */
|
||||
dbg_info = (struct ehci_debug_info *)
|
||||
(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - sizeof(struct ehci_debug_info));
|
||||
|
||||
if (dbg_info->ehci_debug) {
|
||||
dbgp_bulk_write_x(dbg_info, (char*)&data, 1);
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
|
|
|
@ -5,7 +5,6 @@ ramstage-$(CONFIG_UDELAY_IO) += udelay_io.c
|
|||
ramstage-y += keyboard.c
|
||||
|
||||
romstage-$(CONFIG_USE_OPTION_TABLE) += mc146818rtc_early.c
|
||||
romstage-$(CONFIG_USBDEBUG) += usbdebug_serial.c
|
||||
subdirs-y += vga
|
||||
|
||||
$(obj)/pc80/mc146818rtc.ramstage.o : $(OPTION_TABLE_H)
|
||||
|
|
|
@ -1,57 +0,0 @@
|
|||
/*
|
||||
* This file is part of the coreboot project.
|
||||
*
|
||||
* Copyright (C) 2007 AMD
|
||||
* Written by Yinghai Lu <yinghai.lu@amd.com> for AMD.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; version 2 of the License.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA
|
||||
*/
|
||||
|
||||
#include "../lib/usbdebug.c"
|
||||
#include <arch/io.h>
|
||||
#include <ehci.h>
|
||||
|
||||
void early_usbdebug_init(void)
|
||||
{
|
||||
struct ehci_debug_info *dbg_info = (struct ehci_debug_info *)
|
||||
(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - sizeof(struct ehci_debug_info));
|
||||
|
||||
usbdebug_init(CONFIG_EHCI_BAR, CONFIG_EHCI_DEBUG_OFFSET, dbg_info);
|
||||
}
|
||||
|
||||
void usbdebug_tx_byte(unsigned char data)
|
||||
{
|
||||
struct ehci_debug_info *dbg_info;
|
||||
|
||||
/* "Find" dbg_info structure in Cache */
|
||||
dbg_info = (struct ehci_debug_info *)
|
||||
(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - sizeof(struct ehci_debug_info));
|
||||
|
||||
if (dbg_info->ehci_debug) {
|
||||
dbgp_bulk_write_x(dbg_info, (char*)&data, 1);
|
||||
}
|
||||
}
|
||||
|
||||
void usbdebug_ram_tx_byte(unsigned char data)
|
||||
{
|
||||
struct ehci_debug_info *dbg_info;
|
||||
|
||||
/* "Find" dbg_info structure in RAM */
|
||||
dbg_info = (struct ehci_debug_info *)
|
||||
((CONFIG_RAMTOP) - sizeof(struct ehci_debug_info));
|
||||
|
||||
if (dbg_info->ehci_debug) {
|
||||
dbgp_bulk_write_x(dbg_info, (char*)&data, 1);
|
||||
}
|
||||
}
|
Loading…
Reference in New Issue