drivers/net/phy/m88e1512: Add downshift enable
This patch provides the functionality to enable downshift on Marvell PHY. By setting a downshift counter, the PHY is correspondingly often attempted to establish Gigabit link before the PHY downshifts to the next highest speed. The range is limited to 8 trials. To activate downshift, a software reset must follow to take effect. Change-Id: I4224eab6c1fc13824d53556c80435bc130a13bdb Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69853 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -8,4 +8,7 @@ struct drivers_net_phy_m88e1512_config {
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unsigned char led_1_ctrl; /* LED[1] Control */
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unsigned char led_2_ctrl; /* LED[2] Control */
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bool enable_int; /* INTn can be routed to LED[2] pin */
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/* 1x, 2x,...8x is the number of times the PHY attempts to establish Gigabit link
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before the PHY downshifts to the next highest speed. */
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unsigned char downshift_cnt;
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};
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@ -17,6 +17,28 @@ static void m88e1512_init(struct device *dev)
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struct drivers_net_phy_m88e1512_config *config = dev->chip_info;
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uint16_t reg;
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/* Enable downshift. */
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if (config->downshift_cnt) {
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if (config->downshift_cnt > DOWNSHIFT_CNT_MAX) {
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printk(BIOS_INFO, "%s: Downshift counter for %s is too large.\n",
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dev_path(dev->bus->dev), dev->chip_ops->name);
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} else {
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printk(BIOS_DEBUG, "%s: Enable downshift after %d attempts for %s.\n",
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dev_path(dev->bus->dev), config->downshift_cnt,
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dev->chip_ops->name);
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reg = mdio_read(dev, COPPER_SPEC_CTRL_REG_1);
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clrsetbits16(®, DOWNSHIFT_CNT_MASK,
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DOWNSHIFT_CNT(config->downshift_cnt) | DOWNSHIFT_EN);
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mdio_write(dev, COPPER_SPEC_CTRL_REG_1, reg);
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/* Downshift enable requires a software reset to take effect. */
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reg = mdio_read(dev, COPPER_CTRL_REG);
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setbits16(®, SOFTWARE_RESET);
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mdio_write(dev, COPPER_CTRL_REG, reg);
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}
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}
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/* Configure LEDs if requested. */
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if (config->configure_leds) {
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printk(BIOS_DEBUG, "%s: Set a customized LED mode for %s.\n",
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@ -5,6 +5,15 @@
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/* Register layout */
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#define PAGE_REG 0x16
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/* Page 0 registers */
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#define COPPER_CTRL_REG 0
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#define SOFTWARE_RESET (1 << 15)
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#define COPPER_SPEC_CTRL_REG_1 0x10
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#define DOWNSHIFT_CNT_MASK 0x7000
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#define DOWNSHIFT_CNT_MAX 8
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#define DOWNSHIFT_CNT(cnt) ((cnt - 1) << 12)
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#define DOWNSHIFT_EN (1 << 11)
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/* Page 3 registers */
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#define LED_FUNC_CTRL_REG 0x10
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#define LED_FUNC_CTRL_MASK 0x0FFF
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#define LED_TIMER_CTRL_REG 0x12
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