siemens/mc_apl1: Select DDR50 mode for eMMC

To increase the lifetime of the circuit, it is necessary to reduce the
eMMC speed to DDR50 mode.

Change-Id: I40658b44a99e6600ed00950a1a177961f0055e7a
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/28283
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>

src/mainboard/siemens/mc_apl1/variants/mc_apl1/devicetree.cb

@@ -43,6 +43,9 @@ chip soc/intel/apollolake
 	# [6:0] steps of delay for HS200, each 125ps.
 	register "emmc_rx_cmd_data_cntl2" = "0x10008"
 
+	# 0:HS400(Default), 1:HS200, 2:DDR50
+	register "emmc_host_max_speed" = "2"
+
 	# Intel Common SoC Config
 	#+-------------------+---------------------------+
 	#| Field             |  Value                    |