This fixes a few vendor IDs to conform with JEDEC publication 106W
(JEP106W), adds some device IDs and provides information about non-conforming IDs. The EON change is left to the patch adding EON chips. This patch should have no effect on code generation. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Corey Osgood <corey.osgood@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3029 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -59,16 +59,16 @@ extern struct flashchip flashchips[];
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* All SPI parts have 16-bit device IDs.
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*/
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#define ALLIANCE_ID 0x52 /* Alliance */
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#define ALLIANCE_ID 0x52 /* Alliance Semiconductor */
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#define AMD_ID 0x01 /* AMD */
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#define AM_29F040B 0xA4
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#define AM_29LV040B 0x4F
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#define AM_29F016D 0xAD
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#define AMIC_ID 0x37 /* AMIC */
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#define AMIC_ID 0x7F37 /* AMIC */
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#define ASD_ID 0x25 /* ASD */
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#define ASD_ID 0x25 /* ASD, not listed in JEP106W */
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#define ASD_AE49F2008 0x52
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#define ATMEL_ID 0x1F /* Atmel */
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@ -79,14 +79,14 @@ extern struct flashchip flashchips[];
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#define CATALYST_ID 0x31 /* Catalyst */
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#define EMST_ID 0x8C /* EMST / EFST */
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#define EMST_ID 0x8C /* EMST / EFST Elite Flash Storage*/
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#define EMST_F49B002UA 0x00
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/*
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* EN25 chips are SPI, first byte of device ID is memory type,
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* second byte of device ID is log(bitsize)-9.
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*/
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#define EON_ID 0x1C /* EON */
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#define EON_ID 0x1C /* EON Silicon Devices */
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#define EN_25B05 0x2010 /* 2^19 kbit or 2^16 kByte */
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#define EN_25B10 0x2011
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#define EN_25B20 0x2012
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@ -96,17 +96,24 @@ extern struct flashchip flashchips[];
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#define EN_25B32 0x2016
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#define FUJITSU_ID 0x04 /* Fujitsu */
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#define MBM29F400TC 0x23
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/* MBM29F400TC_STRANGE has a value not mentioned in the data sheet and we
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* try to read it from a location not mentioned in the data sheet.
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*/
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#define MBM29F400TC_STRANGE 0x23
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#define MBM29F400BC 0x7B
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#define MBM29F400TC 0x77
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#define HYUNDAI_ID 0xAD /* Hyundai */
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#define IMT_ID 0x7F /* IMT */
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#define IMT_ID 0x7F1F /* Integrated Memory Technologies */
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#define IM_29F004B 0xAE
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#define IM_29F004T 0xAF
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#define INTEL_ID 0x89 /* Intel */
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#define ISSI_ID 0xD5 /* ISSI */
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#define ISSI_ID 0xD5 /* ISSI Integrated Silicon Solutions */
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#define MSYSTEMS_ID 0x156F /* M-Systems */
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#define MSYSTEMS_ID 0x156F /* M-Systems, not listed in JEP106W */
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#define MSYSTEMS_MD2200 0xDB
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#define MSYSTEMS_MD2800 0x30 /* hmm -- both 0x30 */
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#define MSYSTEMS_MD2802 0x30 /* hmm -- both 0x30 */
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@ -128,6 +135,9 @@ extern struct flashchip flashchips[];
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#define MX_25L3235D 0x2416
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#define MX_29F002 0xB0
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/* Programmable Micro Corp is listed in JEP106W in bank 2, so it should have
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* a 0x7F continuation code prefix.
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*/
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#define PMC_ID 0x9D /* PMC */
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#define PMC_49FL002 0x6D
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#define PMC_49FL004 0x6E
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@ -171,7 +181,7 @@ extern struct flashchip flashchips[];
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* ST25P chips are SPI, first byte of device ID is memory type, second
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* byte of device ID is related to log(bitsize) at least for some chips.
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*/
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#define ST_ID 0x20 /* ST */
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#define ST_ID 0x20 /* ST / SGS/Thomson */
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#define ST_M25P05A 0x2010
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#define ST_M25P10A 0x2011
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#define ST_M25P20 0x2012
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@ -42,7 +42,7 @@ struct flashchip flashchips[] = {
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probe_jedec, erase_chip_jedec, write_jedec},
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{"At49F002(N)T",ATMEL_ID, AT_49F002NT, 256, 256,
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probe_jedec, erase_chip_jedec, write_jedec},
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{"MBM29F400TC", FUJITSU_ID, MBM29F400TC, 512, 64 * 1024,
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{"MBM29F400TC", FUJITSU_ID, MBM29F400TC_STRANGE, 512, 64 * 1024,
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probe_m29f400bt, erase_m29f400bt, write_linuxbios_m29f400bt},
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{"MX29F002", MX_ID, MX_29F002, 256, 64 * 1024,
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probe_29f002, erase_29f002, write_29f002},
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@ -64,6 +64,9 @@ int probe_m29f400bt(struct flashchip *flash)
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myusec_delay(10);
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id1 = *(volatile uint8_t *)bios;
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/* The data sheet says id2 is at (bios + 0x01) and id2 listed in
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* flash.h does not match. It should be possible to use JEDEC probe.
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*/
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id2 = *(volatile uint8_t *)(bios + 0x02);
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*(volatile uint8_t *)(bios + 0xAAA) = 0xAA;
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