From 170d33dba4148acc627ebc9049fa2b6b3cf7f003 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Thu, 27 May 2021 10:03:10 +0200 Subject: [PATCH] cpu/x86/fpu_enable.inc: Remove file used by romcc MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: I530bb217bb9a944990232dcf4e08f160b5267512 Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/c/coreboot/+/55008 Reviewed-by: Paul Menzel Reviewed-by: Kyösti Mälkki Tested-by: build bot (Jenkins) --- src/cpu/x86/fpu_enable.inc | 22 ---------------------- 1 file changed, 22 deletions(-) delete mode 100644 src/cpu/x86/fpu_enable.inc diff --git a/src/cpu/x86/fpu_enable.inc b/src/cpu/x86/fpu_enable.inc deleted file mode 100644 index 28d2063b21..0000000000 --- a/src/cpu/x86/fpu_enable.inc +++ /dev/null @@ -1,22 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -__fpu_start: - /* Preserve BIST. */ - movl %eax, %ebp - - /* - * Clear the CR0[2] bit (the "Emulation" flag, EM). - * - * This indicates that the processor has an (internal or external) - * x87 FPU, i.e. floating point operations will be executed by the - * hardware (and not emulated in software). - * - * Additionally, if this bit is not cleared, MMX/SSE instructions won't - * work, i.e., they will trigger an invalid opcode exception (#UD). - */ - movl %cr0, %eax - andl $~(1 << 2), %eax - movl %eax, %cr0 - - /* Restore BIST. */ - movl %ebp, %eax