diff --git a/src/soc/amd/common/fsp/dmi.c b/src/soc/amd/common/fsp/dmi.c
index e3b6fad221..b443fe2533 100644
--- a/src/soc/amd/common/fsp/dmi.c
+++ b/src/soc/amd/common/fsp/dmi.c
@@ -37,6 +37,25 @@ static uint16_t ddr_speed_mhz_to_reported_mts(uint16_t ddr_type, uint16_t speed)
 	}
 }
 
+/**
+ * Return DDR voltage (in mV) based on memory type
+ */
+static uint16_t ddr_get_voltage(uint16_t ddr_type)
+{
+	switch (ddr_type) {
+	case MEMORY_TYPE_DDR4:
+		return 1200;
+	case MEMORY_TYPE_LPDDR4:
+	case MEMORY_TYPE_DDR5:
+		return 1100;
+	case MEMORY_TYPE_LPDDR5:
+		return 1050;
+	default:
+		printk(BIOS_ERR, "Unknown memory type %x\n", ddr_type);
+		return 0;
+	}
+}
+
 /**
  * Populate dimm_info using AGESA TYPE17_DMI_INFO.
  */
@@ -67,6 +86,8 @@ static void transfer_memory_info(const TYPE17_DMI_INFO *dmi17,
 
 	dimm->bank_locator = 0;
 
+	dimm->vdd_voltage = ddr_get_voltage(dmi17->MemoryType);
+
 	strncpy((char *)dimm->module_part_number, dmi17->PartNumber,
 		sizeof(dimm->module_part_number) - 1);
 }
@@ -79,6 +100,7 @@ static void print_dimm_info(const struct dimm_info *dimm)
 	       "  ddr_type: 0x%hx\n"
 	       "  max_speed_mts: %hu\n"
 	       "  config_speed_mts: %hu\n"
+	       "  vdd_voltage: %hu\n"
 	       "  rank_per_dimm: %hhu\n"
 	       "  channel_num: %hhu\n"
 	       "  dimm_num: %hhu\n"
@@ -92,6 +114,7 @@ static void print_dimm_info(const struct dimm_info *dimm)
 	       dimm->ddr_type,
 	       dimm->max_speed_mts,
 	       dimm->configured_speed_mts,
+	       dimm->vdd_voltage,
 	       dimm->rank_per_dimm,
 	       dimm->channel_num,
 	       dimm->dimm_num,