soc/intel/skylake: Add Maxim 98927 and Realtek 5663 NHLT blob support
Add APIs and required parameters for creating Maxim 98927 and Realtek 5336 SSP endpoints in NHLT table. BUG=chrome-os-partner:62051 BRANCH=None TEST=check that NHLT table created is created properly Change-Id: Ica302aab05c5364faf4923dc5327be8e8eaae8b4 Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com> Signed-off-by: Naresh G Solanki <naresh.solanki@intel.com> Signed-off-by: M Naveen <naveen.m@intel.com> Reviewed-on: https://review.coreboot.org/18213 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com>
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@ -59,6 +59,7 @@ config CPU_SPECIFIC_OPTIONS
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select TSC_CONSTANT_RATE
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select TSC_CONSTANT_RATE
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select TSC_SYNC_MFENCE
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select TSC_SYNC_MFENCE
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select UDELAY_TSC
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select UDELAY_TSC
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select ACPI_NHLT
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config MAINBOARD_USES_FSP2_0
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config MAINBOARD_USES_FSP2_0
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bool
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bool
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@ -234,6 +235,18 @@ config NHLT_SSM4567
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help
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help
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Include DSP firmware settings for ssm4567 smart amplifier.
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Include DSP firmware settings for ssm4567 smart amplifier.
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config NHLT_RT5663
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bool
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default n
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help
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Include DSP firmware settings for rt5663 headset codec.
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config NHLT_MAX98927
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bool
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default n
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help
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Include DSP firmware settings for max98927 amplifier.
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config SKIP_FSP_CAR
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config SKIP_FSP_CAR
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bool "Skip cache as RAM setup in FSP"
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bool "Skip cache as RAM setup in FSP"
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default y
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default y
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@ -60,4 +60,16 @@ int nhlt_soc_add_ssm4567(struct nhlt *nhlt, int hwlink);
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*/
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*/
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int nhlt_soc_add_max98357(struct nhlt *nhlt, int hwlink);
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int nhlt_soc_add_max98357(struct nhlt *nhlt, int hwlink);
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/*
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* Add rt5663 headset codec on provided SSP link. Return 0 on success, < 0
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* on error.
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*/
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int nhlt_soc_add_rt5663(struct nhlt *nhlt, int hwlink);
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/*
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* Add max98927 amplifier in stereo configuration on provided SSP link.
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* Return 0 on success, < 0 on error.
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*/
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int nhlt_soc_add_max98927(struct nhlt *nhlt, int hwlink);
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#endif
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#endif
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@ -2,15 +2,24 @@ ramstage-y += dmic.c
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ramstage-y += nau88l25.c
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ramstage-y += nau88l25.c
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ramstage-y += max98357.c
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ramstage-y += max98357.c
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ramstage-y += ssm4567.c
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ramstage-y += ssm4567.c
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ramstage-y += rt5663.c
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ramstage-y += max98927.c
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# DSP firmware settings files.
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# DSP firmware settings files.
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NHLT_BLOB_PATH = 3rdparty/blobs/soc/intel/skylake
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ifeq ($(CONFIG_SOC_INTEL_KABYLAKE),y)
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NHLT_BLOB_PATH = 3rdparty/blobs/soc/intel/kabylake/nhlt-blobs
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else
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NHLT_BLOB_PATH = 3rdparty/blobs/soc/intel/skylake/nhlt-blobs
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endif
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DMIC_2CH_48KHZ_16B = dmic-2ch-48khz-16b.bin
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DMIC_2CH_48KHZ_16B = dmic-2ch-48khz-16b.bin
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DMIC_2CH_48KHZ_32B = dmic-2ch-48khz-32b.bin
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DMIC_2CH_48KHZ_32B = dmic-2ch-48khz-32b.bin
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DMIC_4CH_48KHZ_16B = dmic-4ch-48khz-16b.bin
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DMIC_4CH_48KHZ_16B = dmic-4ch-48khz-16b.bin
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DMIC_4CH_48KHZ_32B = dmic-4ch-48khz-32b.bin
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DMIC_4CH_48KHZ_32B = dmic-4ch-48khz-32b.bin
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NAU88L25 = nau88l25-2ch-48khz-24b.bin
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NAU88L25 = nau88l25-2ch-48khz-24b.bin
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MAX98357_RENDER = max98357-render-2ch-48khz-24b.bin
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MAX98357_RENDER = max98357-render-2ch-48khz-24b.bin
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MAX98927_RENDER = max98927-render-2ch-48khz-24b.bin
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RT5663 = rt5663-2ch-48khz-24b.bin
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SSM4567_RENDER = ssm4567-render-2ch-48khz-24b.bin
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SSM4567_RENDER = ssm4567-render-2ch-48khz-24b.bin
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SSM4567_CAPTURE = ssm4567-capture-4ch-48khz-32b.bin
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SSM4567_CAPTURE = ssm4567-capture-4ch-48khz-32b.bin
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@ -45,3 +54,11 @@ $(SSM4567_RENDER)-type := raw
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cbfs-files-$(CONFIG_NHLT_SSM4567) += $(SSM4567_CAPTURE)
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cbfs-files-$(CONFIG_NHLT_SSM4567) += $(SSM4567_CAPTURE)
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$(SSM4567_CAPTURE)-file := $(NHLT_BLOB_PATH)/$(SSM4567_CAPTURE)
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$(SSM4567_CAPTURE)-file := $(NHLT_BLOB_PATH)/$(SSM4567_CAPTURE)
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$(SSM4567_CAPTURE)-type := raw
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$(SSM4567_CAPTURE)-type := raw
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cbfs-files-$(CONFIG_NHLT_RT5663) += $(RT5663)
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$(RT5663)-file := $(NHLT_BLOB_PATH)/$(RT5663)
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$(RT5663)-type := raw
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cbfs-files-$(CONFIG_NHLT_MAX98927) += $(MAX98927_RENDER)
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$(MAX98927_RENDER)-file := $(NHLT_BLOB_PATH)/$(MAX98927_RENDER)
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$(MAX98927_RENDER)-type := raw
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@ -0,0 +1,47 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2017 Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <soc/nhlt.h>
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static const struct nhlt_format_config max98927_render_formats[] = {
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/* 48 KHz 24-bits per sample. */
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{
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.num_channels = 2,
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.sample_freq_khz = 48,
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.container_bits_per_sample = 32,
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.valid_bits_per_sample = 24,
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.speaker_mask = SPEAKER_FRONT_LEFT | SPEAKER_FRONT_RIGHT,
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.settings_file = "max98927-render-2ch-48khz-24b.bin",
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},
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};
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static const struct nhlt_endp_descriptor max98927_descriptors[] = {
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{
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.link = NHLT_LINK_SSP,
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.device = NHLT_SSP_DEV_I2S,
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.direction = NHLT_DIR_RENDER,
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.vid = NHLT_VID,
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.did = NHLT_DID_SSP,
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.formats = max98927_render_formats,
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.num_formats = ARRAY_SIZE(max98927_render_formats),
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},
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};
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int nhlt_soc_add_max98927(struct nhlt *nhlt, int hwlink)
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{
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/* Virtual bus id of SSP links are the hardware port ids proper. */
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return nhlt_add_ssp_endpoints(nhlt, hwlink, max98927_descriptors,
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ARRAY_SIZE(max98927_descriptors));
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}
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@ -0,0 +1,75 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2017 Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <soc/nhlt.h>
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/*
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* The same DSP firmware settings are used for both the capture and
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* render endpoints.
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*/
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static const struct nhlt_format_config rt5663_formats[] = {
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/* 48 KHz 24-bits per sample. */
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{
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.num_channels = 2,
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.sample_freq_khz = 48,
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.container_bits_per_sample = 32,
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.valid_bits_per_sample = 24,
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.speaker_mask = SPEAKER_FRONT_LEFT | SPEAKER_FRONT_RIGHT,
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.settings_file = "rt5663-2ch-48khz-24b.bin",
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},
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};
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/*
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* The rt5663 just has headphones and a mic. Both the capture and render
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* endpoints occupy the same virtual slot.
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*/
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static const struct nhlt_tdm_config tdm_config = {
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.virtual_slot = 0,
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.config_type = NHLT_TDM_BASIC,
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};
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static const struct nhlt_endp_descriptor rt5663_descriptors[] = {
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/* Render Endpoint */
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{
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.link = NHLT_LINK_SSP,
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.device = NHLT_SSP_DEV_I2S,
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.direction = NHLT_DIR_RENDER,
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.vid = NHLT_VID,
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.did = NHLT_DID_SSP,
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.cfg = &tdm_config,
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.cfg_size = sizeof(tdm_config),
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.formats = rt5663_formats,
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.num_formats = ARRAY_SIZE(rt5663_formats),
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},
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/* Capture Endpoint */
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{
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.link = NHLT_LINK_SSP,
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.device = NHLT_SSP_DEV_I2S,
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.direction = NHLT_DIR_CAPTURE,
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.vid = NHLT_VID,
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.did = NHLT_DID_SSP,
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.cfg = &tdm_config,
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.cfg_size = sizeof(tdm_config),
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.formats = rt5663_formats,
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.num_formats = ARRAY_SIZE(rt5663_formats),
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},
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};
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int nhlt_soc_add_rt5663(struct nhlt *nhlt, int hwlink)
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{
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/* Virtual bus id of SSP links are the hardware port ids proper. */
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return nhlt_add_ssp_endpoints(nhlt, hwlink, rt5663_descriptors,
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ARRAY_SIZE(rt5663_descriptors));
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}
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