From 17431abab00a0f4bd68edb0abab5e9980a1434e5 Mon Sep 17 00:00:00 2001 From: Marc Jones Date: Thu, 16 Nov 2017 15:26:00 -0700 Subject: [PATCH] soc/amd/stoneyridge: Get entire DDR4 SPD Set the SPD size to 512 to get the entire DDR4 SPD. Change-Id: I0bdf8101de22533b2f4337d3c9e4423d62e6c66d Signed-off-by: Marc Jones Reviewed-on: https://review.coreboot.org/22484 Tested-by: build bot (Jenkins) Reviewed-by: Marshall Dawson Reviewed-by: Aaron Durbin --- src/soc/amd/stoneyridge/Kconfig | 4 ++++ src/soc/amd/stoneyridge/dimm_spd.c | 3 ++- 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig index 446c451f71..7f44883800 100644 --- a/src/soc/amd/stoneyridge/Kconfig +++ b/src/soc/amd/stoneyridge/Kconfig @@ -352,4 +352,8 @@ comment "AMD Firmware Directory Table set to location for 8MB ROM" comment "AMD Firmware Directory Table set to location for 16MB ROM" depends on AMD_FWM_POSITION_INDEX = 5 +config DIMM_SPD_SIZE + int + default 512 # DDR4 + endif # SOC_AMD_STONEYRIDGE_FP4 || SOC_AMD_STONEYRIDGE_FT4 diff --git a/src/soc/amd/stoneyridge/dimm_spd.c b/src/soc/amd/stoneyridge/dimm_spd.c index 13fd72fe25..d9f6355da0 100644 --- a/src/soc/amd/stoneyridge/dimm_spd.c +++ b/src/soc/amd/stoneyridge/dimm_spd.c @@ -40,7 +40,8 @@ AGESA_STATUS AmdMemoryReadSPD(UINT32 unused1, UINTN unused2, [info->SocketId][info->MemChannelId][info->DimmId]; if (spd_address == 0) return AGESA_ERROR; - int err = sb_read_spd(spd_address, (void *)info->Buffer, 128); + int err = sb_read_spd(spd_address, (void *)info->Buffer, + CONFIG_DIMM_SPD_SIZE); if (err) return AGESA_ERROR; return AGESA_SUCCESS;