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sb/intel/i82801[ijg]x: remove stale board-specific comments from ich*.asl 

Apparently they were introduced when refining ICH7 support when
porting Kontron 986LCD-M and then copied over to ICH9 and 10.

Change-Id: I2d9ece608955310d22b79574b9113a1521b2076c
Signed-off-by: Stefan Tauner <stefan.tauner@gmx.at>
Reviewed-on: https://review.coreboot.org/27855
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
This commit is contained in:
Stefan Tauner 2018-08-04 22:03:12 +02:00 committed by Patrick Georgi
parent fcba427229
commit 1758e73ee6
3 changed files with 63 additions and 64 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

42
src/southbridge/intel/i82801gx/acpi/ich7.asl
View File

@ -60,28 +60,28 @@ Scope(\)
GP03, 1, GP03, 1,
GP04, 1, GP04, 1,
GP05, 1, GP05, 1,
GP06, 1, // GDET GP06, 1,
GP07, 1, GP07, 1,
GP08, 1, GP08, 1,
GP09, 1, // HPMU GP09, 1,
GP10, 1, // GPSE GP10, 1,
GP11, 1, GP11, 1,
GP12, 1, // WLED GP12, 1,
GP13, 1, // BLED GP13, 1,
GP14, 1, // GLED GP14, 1,
GP15, 1, // GDIS GP15, 1,
GP16, 1, GP16, 1,
GP17, 1, GP17, 1,
GP18, 1, // SPCI GP18, 1,
GP19, 1, // TSDT GP19, 1,
GP20, 1, // SCPU GP20, 1,
GP21, 1, GP21, 1,
GP22, 1, GP22, 1,
GP23, 1, // LANP GP23, 1,
GP24, 1, // DKLR GP24, 1,
GP25, 1, // WLAN GP25, 1,
GP26, 1, // SATA_PWR_EN #0 / SPOF GP26, 1,
GP27, 1, // SATA_PWR_EN #1 / SPMU GP27, 1,
GP28, 1, GP28, 1,
GP29, 1, GP29, 1,
GP30, 1, GP30, 1,
@ -108,13 +108,13 @@ Scope(\)
GIO7, 8, GIO7, 8,
Offset(0x38), // GPIO Level 2 Offset(0x38), // GPIO Level 2
GP32, 1, GP32, 1,
GP33, 1, // CREN GP33, 1,
GP34, 1, // CRRS GP34, 1,
GP35, 1, GP35, 1,
GP36, 1, // STAD GP36, 1,
GP37, 1, // PATA_PWR_EN / HDDE GP37, 1,
GP38, 1, // Battery / Power (?) / MB00 GP38, 1,
GP39, 1, // ?? / MB01 GP39, 1,
GL05, 8, GL05, 8,
GL06, 8, GL06, 8,
GL07, 8 GL07, 8

42
src/southbridge/intel/i82801ix/acpi/ich9.asl
View File

@ -63,28 +63,28 @@ Scope(\)
GP03, 1, GP03, 1,
GP04, 1, GP04, 1,
GP05, 1, GP05, 1,
GP06, 1, // GDET GP06, 1,
GP07, 1, GP07, 1,
GP08, 1, GP08, 1,
GP09, 1, // HPMU GP09, 1,
GP10, 1, // GPSE GP10, 1,
GP11, 1, GP11, 1,
GP12, 1, // WLED GP12, 1,
GP13, 1, // BLED GP13, 1,
GP14, 1, // GLED GP14, 1,
GP15, 1, // GDIS GP15, 1,
GP16, 1, GP16, 1,
GP17, 1, GP17, 1,
GP18, 1, // SPCI GP18, 1,
GP19, 1, // TSDT GP19, 1,
GP20, 1, // SCPU GP20, 1,
GP21, 1, GP21, 1,
GP22, 1, GP22, 1,
GP23, 1, // LANP GP23, 1,
GP24, 1, // DKLR GP24, 1,
GP25, 1, // WLAN GP25, 1,
GP26, 1, // SATA_PWR_EN #0 / SPOF GP26, 1,
GP27, 1, // SATA_PWR_EN #1 / SPMU GP27, 1,
GP28, 1, GP28, 1,
GP29, 1, GP29, 1,
GP30, 1, GP30, 1,
@ -111,13 +111,13 @@ Scope(\)
GIO7, 8, GIO7, 8,
Offset(0x38), // GPIO Level 2 Offset(0x38), // GPIO Level 2
GP32, 1, GP32, 1,
GP33, 1, // CREN GP33, 1,
GP34, 1, // CRRS GP34, 1,
GP35, 1, GP35, 1,
GP36, 1, // STAD GP36, 1,
GP37, 1, // PATA_PWR_EN / HDDE GP37, 1,
GP38, 1, // Battery / Power (?) / MB00 GP38, 1,
GP39, 1, // ?? / MB01 GP39, 1,
GL05, 8, GL05, 8,
GL06, 8, GL06, 8,
GL07, 8 GL07, 8

43
src/southbridge/intel/i82801jx/acpi/ich10.asl
View File

@ -41,7 +41,6 @@ Scope(\)
SCIS, 1 // TCO DMI status SCIS, 1 // TCO DMI status
} }
// FIXME: purposes of the GPIOs (comments) are probably wrong
// ICH10 GPIO IO mapped registers (0x1f.0 reg 0x48.l) // ICH10 GPIO IO mapped registers (0x1f.0 reg 0x48.l)
OperationRegion(GPIO, SystemIO, DEFAULT_GPIOBASE, 0x3c) OperationRegion(GPIO, SystemIO, DEFAULT_GPIOBASE, 0x3c)
Field(GPIO, ByteAcc, NoLock, Preserve) Field(GPIO, ByteAcc, NoLock, Preserve)
@ -63,28 +62,28 @@ Scope(\)
GP03, 1, GP03, 1,
GP04, 1, GP04, 1,
GP05, 1, GP05, 1,
GP06, 1, // GDET GP06, 1,
GP07, 1, GP07, 1,
GP08, 1, GP08, 1,
GP09, 1, // HPMU GP09, 1,
GP10, 1, // GPSE GP10, 1,
GP11, 1, GP11, 1,
GP12, 1, // WLED GP12, 1,
GP13, 1, // BLED GP13, 1,
GP14, 1, // GLED GP14, 1,
GP15, 1, // GDIS GP15, 1,
GP16, 1, GP16, 1,
GP17, 1, GP17, 1,
GP18, 1, // SPCI GP18, 1,
GP19, 1, // TSDT GP19, 1,
GP20, 1, // SCPU GP20, 1,
GP21, 1, GP21, 1,
GP22, 1, GP22, 1,
GP23, 1, // LANP GP23, 1,
GP24, 1, // DKLR GP24, 1,
GP25, 1, // WLAN GP25, 1,
GP26, 1, // SATA_PWR_EN #0 / SPOF GP26, 1,
GP27, 1, // SATA_PWR_EN #1 / SPMU GP27, 1,
GP28, 1, GP28, 1,
GP29, 1, GP29, 1,
GP30, 1, GP30, 1,
@ -111,13 +110,13 @@ Scope(\)
GIO7, 8, GIO7, 8,
Offset(0x38), // GPIO Level 2 Offset(0x38), // GPIO Level 2
GP32, 1, GP32, 1,
GP33, 1, // CREN GP33, 1,
GP34, 1, // CRRS GP34, 1,
GP35, 1, GP35, 1,
GP36, 1, // STAD GP36, 1,
GP37, 1, // PATA_PWR_EN / HDDE GP37, 1,
GP38, 1, // Battery / Power (?) / MB00 GP38, 1,
GP39, 1, // ?? / MB01 GP39, 1,
GL05, 8, GL05, 8,
GL06, 8, GL06, 8,
GL07, 8 GL07, 8