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amd/stoneyridge: Move model_15_init.c to cpu.c 

Move the remaining model_15_init.c functionality to cpu.c, making it
similar to other soc implementations.

Change-Id: Ic8c62b09209fcdaa50ff8ffc7773ef155f979a1b
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/23724
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
This commit is contained in:
Marshall Dawson 2017-10-20 13:20:25 -06:00 committed by Aaron Durbin
parent bb90fb55d0
commit 178e65d227
3 changed files with 31 additions and 60 deletions
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1
src/soc/amd/stoneyridge/Makefile.inc
View File

@ -92,7 +92,6 @@ ramstage-y += southbridge.c
ramstage-y += sb_util.c ramstage-y += sb_util.c
ramstage-$(CONFIG_STONEYRIDGE_IMC_FWM) += imc.c ramstage-$(CONFIG_STONEYRIDGE_IMC_FWM) += imc.c
ramstage-y += lpc.c ramstage-y += lpc.c
ramstage-y += model_15_init.c
ramstage-y += northbridge.c ramstage-y += northbridge.c
ramstage-y += pmutil.c ramstage-y += pmutil.c
ramstage-y += reset.c ramstage-y += reset.c

31
src/soc/amd/stoneyridge/cpu.c
View File

@ -18,6 +18,7 @@
#include <cpu/x86/mp.h> #include <cpu/x86/mp.h>
#include <cpu/x86/mtrr.h> #include <cpu/x86/mtrr.h>
#include <cpu/x86/msr.h> #include <cpu/x86/msr.h>
#include <cpu/x86/lapic.h>
#include <cpu/amd/amdfam15.h> #include <cpu/amd/amdfam15.h>
#include <device/device.h> #include <device/device.h>
#include <soc/pci_devs.h> #include <soc/pci_devs.h>
@ -113,3 +114,33 @@ void stoney_init_cpus(struct device *dev)
if (mp_init_with_smm(dev->link_list, &mp_ops) < 0) if (mp_init_with_smm(dev->link_list, &mp_ops) < 0)
printk(BIOS_ERR, "MP initialization failure.\n"); printk(BIOS_ERR, "MP initialization failure.\n");
} }
static void model_15_init(device_t dev)
{
printk(BIOS_DEBUG, "Model 15 Init.\n");
int i;
msr_t msr;
/* zero the machine check error status registers */
msr.lo = 0;
msr.hi = 0;
for (i = 0 ; i < 6 ; i++)
wrmsr(MCI_STATUS + (i * 4), msr);
setup_lapic();
}
static struct device_operations cpu_dev_ops = {
.init = model_15_init,
};
static struct cpu_device_id cpu_table[] = {
{ X86_VENDOR_AMD, 0x670f00 },
{ 0, 0 },
};
static const struct cpu_driver model_15 __cpu_driver = {
.ops = &cpu_dev_ops,
.id_table = cpu_table,
};

59
src/soc/amd/stoneyridge/model_15_init.c
View File

@ -1,59 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2015-2016 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <console/console.h>
#include <cpu/x86/lapic.h>
#include <cpu/x86/msr.h>
#include <device/device.h>
#include <device/pci.h>
#include <string.h>
#include <cpu/x86/msr.h>
#include <cpu/x86/pae.h>
#include <pc80/mc146818rtc.h>
#include <cpu/cpu.h>
#include <cpu/x86/cache.h>
#include <cpu/amd/amdfam15.h>
#include <arch/acpi.h>
static void model_15_init(device_t dev)
{
printk(BIOS_DEBUG, "Model 15 Init.\n");
int i;
msr_t msr;
/* zero the machine check error status registers */
msr.lo = 0;
msr.hi = 0;
for (i = 0 ; i < 6 ; i++)
wrmsr(MCI_STATUS + (i * 4), msr);
setup_lapic();
}
static struct device_operations cpu_dev_ops = {
.init = model_15_init,
};
static const struct cpu_device_id cpu_table[] = {
{ X86_VENDOR_AMD, 0x670f00 },
{ 0, 0 },
};
static const struct cpu_driver model_15 __cpu_driver = {
.ops = &cpu_dev_ops,
.id_table = cpu_table,
};