From 1799011dc6914927d951cc076a405c6b20ead5d5 Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Tue, 27 Aug 2019 11:01:33 +0530 Subject: [PATCH] soc/intel/{apl,cnl,dnv,icl,skl} : Use common cpu/intel/car/romstage.c code This patch includes common romstage code to setup the console and load postcar. Fix booting regression issue on all latest IA-SOC introduced by CB:34893 Change-Id: I9da592960f20ed9742ff696198dbc028ef519ddf Signed-off-by: Subrata Banik Reviewed-on: https://review.coreboot.org/c/coreboot/+/35109 Tested-by: build bot (Jenkins) Reviewed-by: Ronak Kanabar Reviewed-by: Maulik V Vaghela Reviewed-by: Furquan Shaikh --- src/soc/intel/apollolake/Makefile.inc | 1 + src/soc/intel/cannonlake/romstage/Makefile.inc | 1 + src/soc/intel/denverton_ns/Makefile.inc | 1 + src/soc/intel/icelake/romstage/Makefile.inc | 1 + src/soc/intel/skylake/romstage/Makefile.inc | 2 +- 5 files changed, 5 insertions(+), 1 deletion(-) diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc index 60b1a3c4f5..41faf7243b 100644 --- a/src/soc/intel/apollolake/Makefile.inc +++ b/src/soc/intel/apollolake/Makefile.inc @@ -21,6 +21,7 @@ bootblock-y += spi.c bootblock-y += uart.c romstage-y += car.c +romstage-y += ../../../cpu/intel/car/romstage.c romstage-$(CONFIG_PLATFORM_USES_FSP2_0) += romstage.c romstage-y += gspi.c romstage-y += heci.c diff --git a/src/soc/intel/cannonlake/romstage/Makefile.inc b/src/soc/intel/cannonlake/romstage/Makefile.inc index 75d79856e4..33d9629e1d 100644 --- a/src/soc/intel/cannonlake/romstage/Makefile.inc +++ b/src/soc/intel/cannonlake/romstage/Makefile.inc @@ -13,6 +13,7 @@ # GNU General Public License for more details. # +romstage-y += ../../../../cpu/intel/car/romstage.c romstage-y += romstage.c romstage-y += fsp_params.c romstage-y += systemagent.c diff --git a/src/soc/intel/denverton_ns/Makefile.inc b/src/soc/intel/denverton_ns/Makefile.inc index f01fadbdfe..10bb665bd0 100644 --- a/src/soc/intel/denverton_ns/Makefile.inc +++ b/src/soc/intel/denverton_ns/Makefile.inc @@ -36,6 +36,7 @@ postcar-$(CONFIG_DRIVERS_UART_8250MEM) += uart_debug.c romstage-y += memmap.c romstage-y += reset.c +romstage-y += ../../../cpu/intel/car/romstage.c romstage-y += romstage.c romstage-y += tsc_freq.c romstage-y += gpio_dnv.c diff --git a/src/soc/intel/icelake/romstage/Makefile.inc b/src/soc/intel/icelake/romstage/Makefile.inc index 28e7eada55..baa4d46e55 100644 --- a/src/soc/intel/icelake/romstage/Makefile.inc +++ b/src/soc/intel/icelake/romstage/Makefile.inc @@ -14,5 +14,6 @@ # romstage-y += fsp_params.c +romstage-y += ../../../../cpu/intel/car/romstage.c romstage-y += romstage.c romstage-y += systemagent.c diff --git a/src/soc/intel/skylake/romstage/Makefile.inc b/src/soc/intel/skylake/romstage/Makefile.inc index e929ebaf17..7bb9d4bc03 100644 --- a/src/soc/intel/skylake/romstage/Makefile.inc +++ b/src/soc/intel/skylake/romstage/Makefile.inc @@ -1,4 +1,4 @@ -romstage-$(CONFIG_PLATFORM_USES_FSP1_1) += ../../../../cpu/intel/car/romstage.c +romstage-y += ../../../../cpu/intel/car/romstage.c romstage-$(CONFIG_PLATFORM_USES_FSP1_1) += romstage.c romstage-$(CONFIG_PLATFORM_USES_FSP2_0) += romstage_fsp20.c romstage-y += systemagent.c