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sb/intel/i82870: Get rid of device_t 

Use of device_t has been abandoned in ramstage.

Change-Id: I751b72733de2e3bf3aebd1bc85dc83ec1c406faa
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26258
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
This commit is contained in:
Elyes HAOUAS 2018-05-13 13:38:38 +02:00 committed by Kyösti Mälkki
parent 5af546c5e4
commit 17c59f5da5
2 changed files with 3 additions and 3 deletions
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4
src/southbridge/intel/i82870/ioapic.c
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@ -9,7 +9,7 @@
static int num_p64h2_ioapics = 0; static int num_p64h2_ioapics = 0;
static void p64h2_ioapic_enable(device_t dev) static void p64h2_ioapic_enable(struct device *dev)
{ {
/* We have to enable MEM and Bus Master for IOAPIC */ /* We have to enable MEM and Bus Master for IOAPIC */
uint16_t command = PCI_COMMAND_SERR | PCI_COMMAND_PARITY | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY; uint16_t command = PCI_COMMAND_SERR | PCI_COMMAND_PARITY | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
@ -26,7 +26,7 @@ static void p64h2_ioapic_enable(device_t dev)
* @param dev PCI bus/device/function of P64H2 IOAPIC. * @param dev PCI bus/device/function of P64H2 IOAPIC.
* NOTE: There are two IOAPICs per P64H2, at D28:F0 and D30:F0. * NOTE: There are two IOAPICs per P64H2, at D28:F0 and D30:F0.
*/ */
static void p64h2_ioapic_init(device_t dev) static void p64h2_ioapic_init(struct device *dev)
{ {
uint32_t memoryBase; uint32_t memoryBase;
int apic_index, apic_id; int apic_index, apic_id;

2
src/southbridge/intel/i82870/pcibridge.c
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@ -6,7 +6,7 @@
#include <pc80/mc146818rtc.h> #include <pc80/mc146818rtc.h>
#include "82870.h" #include "82870.h"
static void p64h2_pcix_init(device_t dev) static void p64h2_pcix_init(struct device *dev)
{ {
u32 dword; u32 dword;
u8 byte; u8 byte;