soc/intel/common: Use CPUID_STRUCT_EXTENDED_FEATURE_FLAGS macro
Use CPUID_STRUCT_EXTENDED_FEATURE_FLAGS macro to get extended CPU capabilities flags using cpuid_ext inline function. Signed-off-by: Pratikkumar Prajapati <pratikkumar.v.prajapati@intel.com> Change-Id: If680ffff64e2e1dabded8c03c4042d349a11b635 Reviewed-on: https://review.coreboot.org/c/coreboot/+/71646 Reviewed-by: Subrata Banik <subratabanik@google.com> Reviewed-by: Sridhar Siricilla <sridhar.siricilla@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -506,8 +506,8 @@ bool is_tme_supported(void)
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{
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{
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struct cpuid_result cpuid_regs;
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struct cpuid_result cpuid_regs;
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cpuid_regs = cpuid_ext(0x7, 0x0); /* ECX[13] is feature capability */
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/* ECX[13] is feature capability */
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cpuid_regs = cpuid_ext(CPUID_STRUCT_EXTENDED_FEATURE_FLAGS, 0x0);
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return (cpuid_regs.ecx & TME_SUPPORTED);
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return (cpuid_regs.ecx & TME_SUPPORTED);
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}
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}
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@ -529,7 +529,8 @@ bool is_sgx_supported(void)
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struct cpuid_result cpuid_regs;
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struct cpuid_result cpuid_regs;
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msr_t msr;
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msr_t msr;
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cpuid_regs = cpuid_ext(0x7, 0x0); /* EBX[2] is feature capability */
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/* EBX[2] is feature capability */
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cpuid_regs = cpuid_ext(CPUID_STRUCT_EXTENDED_FEATURE_FLAGS, 0x0);
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msr = rdmsr(MTRR_CAP_MSR); /* Bit 12 is PRMRR enablement */
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msr = rdmsr(MTRR_CAP_MSR); /* Bit 12 is PRMRR enablement */
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return ((cpuid_regs.ebx & SGX_SUPPORTED) && (msr.lo & MTRR_CAP_PRMRR));
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return ((cpuid_regs.ebx & SGX_SUPPORTED) && (msr.lo & MTRR_CAP_PRMRR));
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}
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}
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@ -539,7 +540,8 @@ bool is_keylocker_supported(void)
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struct cpuid_result cpuid_regs;
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struct cpuid_result cpuid_regs;
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msr_t msr;
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msr_t msr;
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cpuid_regs = cpuid_ext(0x7, 0x0); /* ECX[23] is feature capability */
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/* ECX[23] is feature capability */
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cpuid_regs = cpuid_ext(CPUID_STRUCT_EXTENDED_FEATURE_FLAGS, 0x0);
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msr = rdmsr(MTRR_CAP_MSR); /* Bit 12 is PRMRR enablement */
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msr = rdmsr(MTRR_CAP_MSR); /* Bit 12 is PRMRR enablement */
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return ((cpuid_regs.ecx & KEYLOCKER_SUPPORTED) && (msr.lo & MTRR_CAP_PRMRR));
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return ((cpuid_regs.ecx & KEYLOCKER_SUPPORTED) && (msr.lo & MTRR_CAP_PRMRR));
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}
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}
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