mainboard/google/kahlee: Update Grunt for 16MB ROM chip
- Update Grunt to 16MB chip in Kconfig. - Move chromeos.fmd into variant directory & update Kconfig with the new location. - Add Grunt specific chromeos.fmd file. BUG=b:69691210 TEST=Build grunt; Build & Boot Kahlee Change-Id: I8d2f5e3255984d0d9a18df560f84f6db03b73a78 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/22580 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
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@ -16,7 +16,8 @@
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config BOARD_GOOGLE_BASEBOARD_KAHLEE
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config BOARD_GOOGLE_BASEBOARD_KAHLEE
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bool
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bool
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select SOC_AMD_STONEYRIDGE_FT4
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select SOC_AMD_STONEYRIDGE_FT4
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select BOARD_ROMSIZE_KB_8192
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select BOARD_ROMSIZE_KB_16384 if BOARD_GOOGLE_GRUNT
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select BOARD_ROMSIZE_KB_8192 if BOARD_GOOGLE_KAHLEE
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select DRIVERS_PS2_KEYBOARD
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select DRIVERS_PS2_KEYBOARD
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select EC_GOOGLE_CHROMEEC
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select EC_GOOGLE_CHROMEEC
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select EC_GOOGLE_CHROMEEC_LPC
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select EC_GOOGLE_CHROMEEC_LPC
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@ -53,6 +54,15 @@ config MAINBOARD_FAMILY
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string
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string
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default "Google_Kahlee"
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default "Google_Kahlee"
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config FMDFILE
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string
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default "src/mainboard/$(CONFIG_MAINBOARD_DIR)/variants/${CONFIG_VARIANT_DIR}/chromeos.fmd" if CHROMEOS
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default ""
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help
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The build system creates a default FMAP from ROM_SIZE and CBFS_SIZE,
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but in some cases more complex setups are required.
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When an fmd is specified, it overrides the default format.
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config MAX_CPUS
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config MAX_CPUS
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int
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int
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default 4
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default 4
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@ -0,0 +1,40 @@
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FLASH@0xFF000000 0x1000000 {
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SI_BIOS@0x0 0x1000000 {
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RW_SECTION_A@0x0 0x21E000 {
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VBLOCK_A@0x0 0x10000
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FW_MAIN_A(CBFS)@0x10000 0x20DFC0
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RW_FWID_A@0x21DFC0 0x40
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}
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RW_SECTION_B@0x21E000 0x21E000 {
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VBLOCK_B@0x0 0x10000
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FW_MAIN_B(CBFS)@0x10000 0x20DFC0
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RW_FWID_B@0x21DFC0 0x40
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}
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UNIFIED_MRC_CACHE@0x43C000 0x21000 {
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RECOVERY_MRC_CACHE@0x0 0x10000
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RW_MRC_CACHE@0x10000 0x10000
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RW_VAR_MRC_CACHE@0x20000 0x1000
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}
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RW_ELOG@0x45D000 0x4000
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RW_SHARED@0x461000 0x4000 {
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SHARED_DATA@0x0 0x2000
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VBLOCK_DEV@0x2000 0x2000
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}
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RW_VPD@0x465000 0x2000
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RW_UNUSED@0x467000 0x599000
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RW_LEGACY@0xA00000 0x200000
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WP_RO@0xC00000 0x400000 {
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RO_VPD@0x0 0x4000
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RO_UNUSED@0x4000 0x17B000
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RO_SECTION@0x17F000 0x281000 {
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FMAP@0x0 0x800
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RO_FRID@0x800 0x40
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RO_FRID_PAD@0x840 0x7c0
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GBB@0x1000 0x70000
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COREBOOT(CBFS)@0x71000 0x210000
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}
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}
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}
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}
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