ec/google/chromeec: Add code for KEY_MICMUTE and KEY_KBD_BKLIGHT_TOGGLE
- Chromebook have some platform need support MICMUTE and KBDILLUMTOGGLE. - Sync ec_commands.h This change syncs the coreboot version of google ec_commands.h with the ec_commands.h from the google ec repository. This is a straight copy except for the the copyright header. BUG=b:194146863 BRANCH=none TEST=check on evtest type 4 (EV_MSC), code 4 (MSC_SCAN), value 9e type 1 (EV_KEY), code 228 (KEY_KBDILLUMTOGGLE), 1 type 4 (EV_MSC), code 4 (MSC_SCAN), value 9b type 1 (EV_KEY), code 248 (KEY_MICMUTE), value 1 Signed-off-by: Scott Chao <scott_chao@wistron.corp-partner.google.com> Change-Id: Ie4fa3e627f448265f72279704d258b2d3fe8fc17 Reviewed-on: https://review.coreboot.org/c/coreboot/+/56710 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -184,6 +184,8 @@ static const enum ps2_action_key ps2_enum_val[] = {
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[TK_PLAY_PAUSE] = PS2_KEY_PLAY_PAUSE,
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[TK_NEXT_TRACK] = PS2_KEY_NEXT_TRACK,
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[TK_PREV_TRACK] = PS2_KEY_PREV_TRACK,
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[TK_KBD_BKLIGHT_TOGGLE] = PS2_KEY_KBD_BKLIGHT_TOGGLE,
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[TK_MICMUTE] = PS2_KEY_MICMUTE,
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};
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static void fill_ssdt_ps2_keyboard(const struct device *dev)
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@ -452,6 +452,13 @@ extern "C" {
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#define USB_RETIMER_FW_UPDATE_OP_SHIFT 4
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#define USB_RETIMER_FW_UPDATE_ERR 0xfe
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#define USB_RETIMER_FW_UPDATE_INVALID_MUX 0xff
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/* Mask to clear unused MUX bits in retimer firmware update */
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#define USB_RETIMER_FW_UPDATE_MUX_MASK (USB_PD_MUX_USB_ENABLED | \
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USB_PD_MUX_DP_ENABLED | \
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USB_PD_MUX_SAFE_MODE | \
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USB_PD_MUX_TBT_COMPAT_ENABLED | \
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USB_PD_MUX_USB4_ENABLED)
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/* Retimer firmware update operations */
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#define USB_RETIMER_FW_UPDATE_QUERY_PORT 0 /* Which ports has retimer */
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#define USB_RETIMER_FW_UPDATE_SUSPEND_PD 1 /* Suspend PD port */
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@ -1946,7 +1953,13 @@ enum sysinfo_flags {
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SYSTEM_IS_FORCE_LOCKED = BIT(1),
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SYSTEM_JUMP_ENABLED = BIT(2),
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SYSTEM_JUMPED_TO_CURRENT_IMAGE = BIT(3),
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SYSTEM_REBOOT_AT_SHUTDOWN = BIT(4)
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SYSTEM_REBOOT_AT_SHUTDOWN = BIT(4),
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/*
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* Used internally. It's set when EC_HOST_EVENT_KEYBOARD_RECOVERY is
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* set and cleared when the system shuts down (not when the host event
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* flag is cleared).
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*/
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SYSTEM_IN_MANUAL_RECOVERY = BIT(5),
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};
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struct ec_response_sysinfo {
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@ -2670,6 +2683,8 @@ enum motionsensor_chip {
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MOTIONSENSE_CHIP_BMI260 = 24,
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MOTIONSENSE_CHIP_ICM426XX = 25,
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MOTIONSENSE_CHIP_ICM42607 = 26,
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MOTIONSENSE_CHIP_BMA422 = 27,
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MOTIONSENSE_CHIP_BMI323 = 28,
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MOTIONSENSE_CHIP_MAX,
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};
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@ -4246,16 +4261,55 @@ struct ec_params_i2c_write {
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* discharge the battery.
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*/
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#define EC_CMD_CHARGE_CONTROL 0x0096
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#define EC_VER_CHARGE_CONTROL 1
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#define EC_VER_CHARGE_CONTROL 2
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enum ec_charge_control_mode {
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CHARGE_CONTROL_NORMAL = 0,
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CHARGE_CONTROL_IDLE,
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CHARGE_CONTROL_DISCHARGE,
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/* Add no more entry below. */
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CHARGE_CONTROL_COUNT,
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};
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#define EC_CHARGE_MODE_TEXT { \
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[CHARGE_CONTROL_NORMAL] = "NORMAL", \
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[CHARGE_CONTROL_IDLE] = "IDLE", \
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[CHARGE_CONTROL_DISCHARGE] = "DISCHARGE", \
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}
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enum ec_charge_control_cmd {
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EC_CHARGE_CONTROL_CMD_SET = 0,
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EC_CHARGE_CONTROL_CMD_GET,
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};
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struct ec_params_charge_control {
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uint32_t mode; /* enum charge_control_mode */
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/* Below are the fields added in V2. */
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uint8_t cmd; /* enum ec_charge_control_cmd. */
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uint8_t reserved;
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/*
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* Lower and upper thresholds for battery sustainer. This struct isn't
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* named to avoid tainting foreign projects' name spaces.
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*
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* If charge mode is explicitly set (e.g. DISCHARGE), battery sustainer
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* will be disabled. To disable battery sustainer, set mode=NORMAL,
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* lower=-1, upper=-1.
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*/
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struct {
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int8_t lower; /* Display SoC in percentage. */
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int8_t upper; /* Display SoC in percentage. */
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} sustain_soc;
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} __ec_align4;
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/* Added in v2 */
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struct ec_response_charge_control {
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uint32_t mode; /* enum charge_control_mode */
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struct { /* Battery sustainer thresholds */
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int8_t lower;
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int8_t upper;
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} sustain_soc;
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uint16_t reserved;
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} __ec_align4;
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/*****************************************************************************/
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@ -6331,6 +6385,8 @@ enum action_key {
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TK_PLAY_PAUSE = 15,
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TK_NEXT_TRACK = 16,
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TK_PREV_TRACK = 17,
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TK_KBD_BKLIGHT_TOGGLE = 18,
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TK_MICMUTE = 19,
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};
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/*
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@ -6648,6 +6704,7 @@ enum tcpc_cc_polarity {
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#define PD_STATUS_EVENT_SOP_DISC_DONE BIT(0)
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#define PD_STATUS_EVENT_SOP_PRIME_DISC_DONE BIT(1)
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#define PD_STATUS_EVENT_HARD_RESET BIT(2)
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#define PD_STATUS_EVENT_DISCONNECTED BIT(3)
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/*
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* Encode and decode for BCD revision response
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