vc/amd/psp: Remove unknown section flags
The `d` flag used in .section is unknown in LLVM/clang 17 and fails the build. It is also not documented in the ARM compiler manual. The GNU assembler supports the `d` flag but it also seems to compile without. ARM compiler manual: https://developer.arm.com/documentation/101754/0621/armclang-Reference/armclang-Integrated-Assembler/Section-directives GNU compiler manual: https://sourceware.org/binutils/docs/as/Section.html `coreboot.rom` does not change between compiling a google skyrim board with or without this patch. However the debug info for the following three files in the build directory changes with this patch: * build/verstage/vendorcode/amd/fsp/mendocino/bl_uapp/bl_uapp_end.o * build/cbfs/fallback/verstage.elf * build/cbfs/fallback/verstage.debug Change-Id: Ie3735b72349b0cfdd27364a39bcdda390af7bfa5 Signed-off-by: Lennart Eichhorn <lennarteichhorn@googlemail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/79366 Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -29,7 +29,7 @@
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.arm
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.global LastBytes
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.section PSP_FOOTER_DATA, "ad", %note
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.section PSP_FOOTER_DATA, "a", %note
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.balign 64
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// Note: this is used for determining the size of the binary. It is 64 byte aligned and 64 byte
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.arm
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.global LastBytes
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.section PSP_FOOTER_DATA, "ad", %note
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.section PSP_FOOTER_DATA, "a", %note
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.balign 64
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// Note: this is used for determining the size of the binary. It is 64 byte aligned and 64 byte
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@ -29,7 +29,7 @@
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.arm
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.global LastBytes
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.section PSP_FOOTER_DATA, "ad", %note
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.section PSP_FOOTER_DATA, "a", %note
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.balign 64
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// Note: this is used for determining the size of the binary. It is 64 byte aligned and 64 byte
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@ -29,7 +29,7 @@
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.arm
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.global LastBytes
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.section PSP_FOOTER_DATA, "ad", %note
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.section PSP_FOOTER_DATA, "a", %note
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.balign 64
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// Note: this is used for determining the size of the binary. It is 64 byte aligned and 64 byte
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