post_code: add post code for critical CBFS failures

Add a new post code POST_INVALID_CBFS, used when coreboot fails to
locate or validate a resource that is stored in CBFS.

BUG=b:124401932
BRANCH=sarien
TEST=build coreboot for sarien and arcada platforms

Change-Id: If1c8b92889040f9acd6250f847db02626809a987
Signed-off-by: Keith Short <keithshort@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32771
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>

Documentation/POSTCODES

@@ -17,6 +17,7 @@ This is an (incomplete) list of POST codes emitted by coreboot v4.
 0x88 Devices have been configured
 0x89 Devices have been enabled
 0xe0 Boot media (e.g. SPI ROM) is corrupt
+0xe1 Resource stored within CBFS is corrupt
 0xf8 Entry into elf boot
 0xf3 Jumping to payload
 

src/include/console/post_codes.h

@@ -325,6 +325,13 @@
  */
 #define POST_INVALID_ROM			0xe0
 
+/**
+ * \brief Invalid or corrupt CBFS
+ *
+ * Set if firmware failed to find or validate a resource that is stored in CBFS.
+ */
+#define POST_INVALID_CBFS			0xe1
+
 /**
  * \brief TPM failure
  *

src/soc/intel/quark/romstage/fsp2_0.c

@@ -116,7 +116,8 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *fspm_upd, uint32_t version)
 	/* Locate the RMU data file in flash */
 	rmu_data = locate_rmu_file(&rmu_data_len);
 	if (!rmu_data)
-		die("Microcode file (rmu.bin) not found.");
+		die_with_post_code(POST_INVALID_CBFS,
+			"Microcode file (rmu.bin) not found.");
 
 	/* Locate the configuration data from devicetree.cb */
 	dev = pcidev_path_on_root(LPC_DEV_FUNC);