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armv7: change some unsigned ints to uint32_t 

Use register-sized types in case the inline assembler doesn't do
so automatically.

Change-Id: I3202ba972ef2548323fe557f45dc4b0b1cf6c818
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/2983
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Tested-by: build bot (Jenkins)
This commit is contained in:
David Hendricks 2013-03-29 15:40:34 -07:00
parent 5877935836
commit 1877ceed21
1 changed files with 4 additions and 4 deletions
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8
src/arch/armv7/include/arch/cache.h
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@ -220,9 +220,9 @@ static inline void write_csselr(uint32_t val)
} }
/* read L2 control register (L2CTLR) */ /* read L2 control register (L2CTLR) */
static inline unsigned int read_l2ctlr(void) static inline uint32_t read_l2ctlr(void)
{ {
unsigned int val = 0; uint32_t val = 0;
asm volatile ("mrc p15, 1, %0, c9, c0, 2" : "=r" (val)); asm volatile ("mrc p15, 1, %0, c9, c0, 2" : "=r" (val));
return val; return val;
} }
@ -239,9 +239,9 @@ static inline void write_l2ctlr(uint32_t val)
} }
/* read system control register (SCTLR) */ /* read system control register (SCTLR) */
static inline unsigned int read_sctlr(void) static inline uint32_t read_sctlr(void)
{ {
unsigned int val; uint32_t val;
asm volatile ("mrc p15, 0, %0, c1, c0, 0" : "=r" (val)); asm volatile ("mrc p15, 0, %0, c1, c0, 0" : "=r" (val));
return val; return val;
} }