AMD Bettong: Enable S4 feature for Windows 7
PMIOxEE is for setting USB3 power rail. Set it to S0, otherwise going into hibernation can not be wake up. Change-Id: I692497bad24d745738d670897e725a568c1db114 Signed-off-by: Zheng Bao <zheng.bao@amd.com> Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/11373 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins)
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@ -1005,6 +1005,12 @@ int acpi_is_wakeup_s3(void)
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return (acpi_slp_type == 3);
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}
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int acpi_is_wakeup_s4(void)
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{
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acpi_handoff_wakeup();
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return (acpi_slp_type == 4);
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}
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void acpi_fail_wakeup(void)
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{
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if (acpi_slp_type == 3 || acpi_slp_type == 2)
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@ -596,12 +596,14 @@ static inline int acpi_is_wakeup_s3(void)
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#else
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int acpi_is_wakeup(void);
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int acpi_is_wakeup_s3(void);
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int acpi_is_wakeup_s4(void);
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#endif
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#else
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#define acpi_slp_type 0
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static inline int acpi_is_wakeup(void) { return 0; }
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static inline int acpi_is_wakeup_s3(void) { return 0; }
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static inline int acpi_is_wakeup_s4(void) { return 0; }
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#endif
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#endif /* __ASM_ACPI_H */
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@ -15,6 +15,7 @@
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#include <console/console.h>
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#include <arch/acpi.h>
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#include <arch/io.h>
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#include <arch/stages.h>
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#include <cpu/x86/lapic.h>
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#include <cpu/x86/bist.h>
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@ -78,6 +79,11 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
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prepare_for_resume();
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}
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if (s3resume || acpi_is_wakeup_s4()) {
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outb(0xEE, PM_INDEX);
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outb(0x8, PM_DATA);
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}
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post_code(0x50);
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copy_and_run();
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