cpu/x86/sipi: Add x86_64 support

Enter long mode on secondary APs.

Tested on Lenovo T410 with additional x86_64 patches.
Tested on HP Z220 with additional x86_64 patches.

Still boots on x86_32.

Change-Id: I916dd8482d56c7509af9ad0d3b9c28bdc48fd0b1
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37395
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
This commit is contained in:
Patrick Rudolph 2019-12-01 07:23:59 +01:00 committed by Patrick Rudolph
parent c7a7531cee
commit 18ad7fa51f
3 changed files with 24 additions and 0 deletions

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@ -16,7 +16,12 @@
#endif #endif
#include <cpu/x86/msr.h> #include <cpu/x86/msr.h>
#if defined(__RAMSTAGE__)
#include <arch/ram_segs.h>
#else
#include <arch/rom_segs.h> #include <arch/rom_segs.h>
#endif
setup_longmode: setup_longmode:
/* Get page table address */ /* Get page table address */
@ -42,7 +47,12 @@ setup_longmode:
movl %eax, %cr0 movl %eax, %cr0
/* use long jump to switch to 64-bit code segment */ /* use long jump to switch to 64-bit code segment */
#if defined(__RAMSTAGE__)
ljmp $RAM_CODE_SEG64, $__longmode_start
#else
ljmp $ROM_CODE_SEG64, $__longmode_start ljmp $ROM_CODE_SEG64, $__longmode_start
#endif
.code64 .code64
__longmode_start: __longmode_start:

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@ -24,6 +24,7 @@ ifeq ($(CONFIG_PARALLEL_MP),y)
$(TARGET_STAGE)-srcs += $(SIPI_BIN).manual $(TARGET_STAGE)-srcs += $(SIPI_BIN).manual
endif endif
rmodules_$(ARCH-$(TARGET_STAGE)-y)-$(CONFIG_PARALLEL_MP) += sipi_vector.S rmodules_$(ARCH-$(TARGET_STAGE)-y)-$(CONFIG_PARALLEL_MP) += sipi_vector.S
rmodules_$(ARCH-$(TARGET_STAGE)-y)-generic-ccopts += $($(TARGET_STAGE)-generic-ccopts)
$(SIPI_DOTO): $(call src-to-obj,rmodules_$(ARCH-$(TARGET_STAGE)-y),src/cpu/x86/sipi_vector.S) $(SIPI_DOTO): $(call src-to-obj,rmodules_$(ARCH-$(TARGET_STAGE)-y),src/cpu/x86/sipi_vector.S)
$(LD_rmodules_$(ARCH-$(TARGET_STAGE)-y)) -nostdlib -r -o $@ $^ $(LD_rmodules_$(ARCH-$(TARGET_STAGE)-y)) -nostdlib -r -o $@ $^

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@ -192,11 +192,24 @@ load_msr:
mov %eax, %cr4 mov %eax, %cr4
#endif #endif
#ifdef __x86_64__
/* entry64.inc preserves ebx. */
#include <cpu/x86/64bit/entry64.inc>
mov %rsi, %rdi /* cpu_num */
movl c_handler, %eax
call *%rax
#else
/* c_handler(cpu_num), preserve proper stack alignment */ /* c_handler(cpu_num), preserve proper stack alignment */
sub $12, %esp sub $12, %esp
push %esi /* cpu_num */ push %esi /* cpu_num */
mov c_handler, %eax mov c_handler, %eax
call *%eax call *%eax
#endif
halt_jump: halt_jump:
hlt hlt
jmp halt_jump jmp halt_jump