cpu/x86/sipi: Add x86_64 support
Enter long mode on secondary APs. Tested on Lenovo T410 with additional x86_64 patches. Tested on HP Z220 with additional x86_64 patches. Still boots on x86_32. Change-Id: I916dd8482d56c7509af9ad0d3b9c28bdc48fd0b1 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37395 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
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@ -16,7 +16,12 @@
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#endif
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#endif
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#include <cpu/x86/msr.h>
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#include <cpu/x86/msr.h>
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#if defined(__RAMSTAGE__)
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#include <arch/ram_segs.h>
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#else
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#include <arch/rom_segs.h>
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#include <arch/rom_segs.h>
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#endif
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setup_longmode:
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setup_longmode:
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/* Get page table address */
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/* Get page table address */
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@ -42,7 +47,12 @@ setup_longmode:
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movl %eax, %cr0
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movl %eax, %cr0
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/* use long jump to switch to 64-bit code segment */
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/* use long jump to switch to 64-bit code segment */
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#if defined(__RAMSTAGE__)
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ljmp $RAM_CODE_SEG64, $__longmode_start
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#else
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ljmp $ROM_CODE_SEG64, $__longmode_start
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ljmp $ROM_CODE_SEG64, $__longmode_start
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#endif
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.code64
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.code64
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__longmode_start:
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__longmode_start:
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@ -24,6 +24,7 @@ ifeq ($(CONFIG_PARALLEL_MP),y)
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$(TARGET_STAGE)-srcs += $(SIPI_BIN).manual
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$(TARGET_STAGE)-srcs += $(SIPI_BIN).manual
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endif
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endif
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rmodules_$(ARCH-$(TARGET_STAGE)-y)-$(CONFIG_PARALLEL_MP) += sipi_vector.S
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rmodules_$(ARCH-$(TARGET_STAGE)-y)-$(CONFIG_PARALLEL_MP) += sipi_vector.S
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rmodules_$(ARCH-$(TARGET_STAGE)-y)-generic-ccopts += $($(TARGET_STAGE)-generic-ccopts)
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$(SIPI_DOTO): $(call src-to-obj,rmodules_$(ARCH-$(TARGET_STAGE)-y),src/cpu/x86/sipi_vector.S)
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$(SIPI_DOTO): $(call src-to-obj,rmodules_$(ARCH-$(TARGET_STAGE)-y),src/cpu/x86/sipi_vector.S)
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$(LD_rmodules_$(ARCH-$(TARGET_STAGE)-y)) -nostdlib -r -o $@ $^
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$(LD_rmodules_$(ARCH-$(TARGET_STAGE)-y)) -nostdlib -r -o $@ $^
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@ -192,11 +192,24 @@ load_msr:
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mov %eax, %cr4
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mov %eax, %cr4
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#endif
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#endif
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#ifdef __x86_64__
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/* entry64.inc preserves ebx. */
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#include <cpu/x86/64bit/entry64.inc>
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mov %rsi, %rdi /* cpu_num */
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movl c_handler, %eax
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call *%rax
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#else
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/* c_handler(cpu_num), preserve proper stack alignment */
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/* c_handler(cpu_num), preserve proper stack alignment */
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sub $12, %esp
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sub $12, %esp
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push %esi /* cpu_num */
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push %esi /* cpu_num */
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mov c_handler, %eax
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mov c_handler, %eax
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call *%eax
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call *%eax
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#endif
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halt_jump:
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halt_jump:
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hlt
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hlt
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jmp halt_jump
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jmp halt_jump
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