mainboard/intel/cannonlake: Add ec entry into flashmap
Add EC entries into chromeos.fmd file. BRANCH=None BUG=None TEST=Flash image and confirm system can get out of reset successfully. System will not be able to reach reset vector if flash map described in coreboot does not match intel flash map generated from fit. Change-Id: Ic18ce59941b4ff8171fe661d332e3e521d988341 Signed-off-by: Lijian Zhao <lijian.zhao@intel.com> Reviewed-on: https://review.coreboot.org/21526 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -1,9 +1,10 @@
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FLASH@0xff000000 0x1000000 {
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SI_ALL@0x0 0x300000 {
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SI_ALL@0x0 0x380000 {
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SI_DESC@0x0 0x1000
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SI_ME@0x1000 0x2ff000
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SI_EC@0x01000 0x80000
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SI_ME@0x81000 0x2ff000
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}
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SI_BIOS@0x300000 0xd00000 {
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SI_BIOS@0x380000 0xc80000 {
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RW_SECTION_A@0x0 0x368000 {
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VBLOCK_A@0x0 0x10000
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FW_MAIN_A(CBFS)@0x10000 0x357fc0
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@ -28,15 +29,15 @@ FLASH@0xff000000 0x1000000 {
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RW_NVRAM@0x2a000 0x6000
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}
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RW_LEGACY(CBFS)@0x700000 0x200000
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WP_RO@0x900000 0x400000 {
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WP_RO@0x900000 0x380000 {
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RO_VPD@0x0 0x4000
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RO_UNUSED@0x4000 0xc000
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RO_SECTION@0x10000 0x3f0000 {
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RO_SECTION@0x10000 0x370000 {
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FMAP@0x0 0x800
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RO_FRID@0x800 0x40
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RO_FRID_PAD@0x840 0x7c0
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GBB@0x1000 0xef000
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COREBOOT(CBFS)@0xf0000 0x300000
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COREBOOT(CBFS)@0xf0000 0x280000
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}
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}
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}
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