soc/intel/common: Add TGL-H PCI IDs
Add TGL-H PCI IDs from the Processor and PCH EDS docs. Reference: - Intel doc 615985 - Intel doc 575683 Change-Id: I751d0d59aff9e93e2aa92546db78775bd1e6ef22 Signed-off-by: Jeremy Soller <jeremy@system76.com> Signed-off-by: Tim Crawford <tcrawford@system76.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56900 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
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@ -54,6 +54,7 @@ static const unsigned short pci_device_ids[] = {
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PCI_DEVICE_ID_INTEL_CNL_ISHB,
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PCI_DEVICE_ID_INTEL_CML_ISHB,
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PCI_DEVICE_ID_INTEL_TGL_ISHB,
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PCI_DEVICE_ID_INTEL_TGL_H_ISHB,
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0
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};
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@ -2159,6 +2159,7 @@
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#define PCI_DEVICE_ID_INTEL_CNL_ISHB 0x9dfc
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#define PCI_DEVICE_ID_INTEL_CML_ISHB 0x02fc
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#define PCI_DEVICE_ID_INTEL_TGL_ISHB 0xa0fc
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#define PCI_DEVICE_ID_INTEL_TGL_H_ISHB 0x43fc
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/* Intel 82371FB (PIIX) */
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#define PCI_DEVICE_ID_INTEL_82371FB_ISA 0x122e
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@ -2935,6 +2936,15 @@
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#define PCI_DEVICE_ID_INTEL_TGP_ESPI_24 0xA09D
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#define PCI_DEVICE_ID_INTEL_TGP_ESPI_25 0xA09E
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#define PCI_DEVICE_ID_INTEL_TGP_ESPI_26 0xA09F
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#define PCI_DEVICE_ID_INTEL_TGP_H_ESPI_B560 0x4387
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#define PCI_DEVICE_ID_INTEL_TGP_H_ESPI_H510 0x4388
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#define PCI_DEVICE_ID_INTEL_TGP_H_ESPI_H570 0x4386
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#define PCI_DEVICE_ID_INTEL_TGP_H_ESPI_Q570 0x4384
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#define PCI_DEVICE_ID_INTEL_TGP_H_ESPI_W580 0x438F
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#define PCI_DEVICE_ID_INTEL_TGP_H_ESPI_Z590 0x4385
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#define PCI_DEVICE_ID_INTEL_TGP_H_ESPI_HM570 0x438B
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#define PCI_DEVICE_ID_INTEL_TGP_H_ESPI_QM580 0x438A
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#define PCI_DEVICE_ID_INTEL_TGP_H_ESPI_WM590 0x4389
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#define PCI_DEVICE_ID_INTEL_MCC_ESPI_0 0x4b00
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#define PCI_DEVICE_ID_INTEL_MCC_ESPI_1 0x4b04
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#define PCI_DEVICE_ID_INTEL_MCC_BASE_ESPI 0x4b03
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@ -3213,6 +3223,31 @@
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#define PCI_DEVICE_ID_INTEL_TGP_LP_PCIE_RP15 0xa0b6
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#define PCI_DEVICE_ID_INTEL_TGP_LP_PCIE_RP16 0xa0b7
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#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP1 0x43b8
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#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP2 0x43b9
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#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP3 0x43ba
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#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP4 0x43bb
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#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP5 0x43bc
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#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP6 0x43bd
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#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP7 0x43be
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#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP8 0x43bf
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#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP9 0x43b0
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#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP10 0x43b1
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#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP11 0x43b2
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#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP12 0x43b3
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#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP13 0x43b4
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#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP14 0x43b5
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#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP15 0x43b6
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#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP16 0x43b7
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#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP17 0x43c0
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#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP18 0x43c1
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#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP19 0x43c2
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#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP20 0x43c3
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#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP21 0x43c4
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#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP22 0x43c5
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#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP23 0x43c6
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#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP24 0x43c7
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#define PCI_DEVICE_ID_INTEL_CNP_H_PCIE_RP1 0xa338
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#define PCI_DEVICE_ID_INTEL_CNP_H_PCIE_RP2 0xa339
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#define PCI_DEVICE_ID_INTEL_CNP_H_PCIE_RP3 0xa33a
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@ -3402,6 +3437,7 @@
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#define PCI_DEVICE_ID_INTEL_TGP_SATA 0xa0d5
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#define PCI_DEVICE_ID_INTEL_TGP_PREMIUM_SATA 0xa0d7
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#define PCI_DEVICE_ID_INTEL_TGP_COMPAT_SATA 0x282a
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#define PCI_DEVICE_ID_INTEL_TGP_H_SATA 0x43d3
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#define PCI_DEVICE_ID_INTEL_MCC_AHCI_SATA 0x4b60
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#define PCI_DEVICE_ID_INTEL_JSP_SATA_1 0x4dd2
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#define PCI_DEVICE_ID_INTEL_JSP_SATA_2 0x4dd3
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@ -3435,6 +3471,7 @@
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#define PCI_DEVICE_ID_INTEL_CMP_PMC 0x02a1
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#define PCI_DEVICE_ID_INTEL_CMP_H_PMC 0x06a1
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#define PCI_DEVICE_ID_INTEL_TGP_PMC 0xa0a1
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#define PCI_DEVICE_ID_INTEL_TGP_H_PMC 0x43a1
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#define PCI_DEVICE_ID_INTEL_MCC_PMC 0x4b21
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#define PCI_DEVICE_ID_INTEL_JSP_PMC 0x4da1
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#define PCI_DEVICE_ID_INTEL_ADP_P_PMC 0x7a21
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@ -3504,6 +3541,13 @@
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#define PCI_DEVICE_ID_INTEL_TGP_I2C5 0xa0c6
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#define PCI_DEVICE_ID_INTEL_TGP_I2C6 0xa0d8
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#define PCI_DEVICE_ID_INTEL_TGP_I2C7 0xa0d9
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#define PCI_DEVICE_ID_INTEL_TGP_H_I2C0 0x43e8
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#define PCI_DEVICE_ID_INTEL_TGP_H_I2C1 0x43e9
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#define PCI_DEVICE_ID_INTEL_TGP_H_I2C2 0x43ea
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#define PCI_DEVICE_ID_INTEL_TGP_H_I2C3 0x43eb
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#define PCI_DEVICE_ID_INTEL_TGP_H_I2C4 0x43ad
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#define PCI_DEVICE_ID_INTEL_TGP_H_I2C5 0x43ae
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#define PCI_DEVICE_ID_INTEL_TGP_H_I2C6 0x43d8
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#define PCI_DEVICE_ID_INTEL_MCC_I2C0 0x4b78
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#define PCI_DEVICE_ID_INTEL_MCC_I2C1 0x4b79
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#define PCI_DEVICE_ID_INTEL_MCC_I2C2 0x4b7a
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@ -3581,6 +3625,10 @@
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#define PCI_DEVICE_ID_INTEL_TGP_UART0 0xa0a8
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#define PCI_DEVICE_ID_INTEL_TGP_UART1 0xa0a9
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#define PCI_DEVICE_ID_INTEL_TGP_UART2 0xa0c7
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#define PCI_DEVICE_ID_INTEL_TGP_H_UART0 0x43a8
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#define PCI_DEVICE_ID_INTEL_TGP_H_UART1 0x43a9
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#define PCI_DEVICE_ID_INTEL_TGP_H_UART2 0x43a7
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#define PCI_DEVICE_ID_INTEL_TGP_H_UART3 0x43da
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#define PCI_DEVICE_ID_INTEL_MCC_UART0 0x4b28
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#define PCI_DEVICE_ID_INTEL_MCC_UART1 0x4b29
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#define PCI_DEVICE_ID_INTEL_MCC_UART2 0x4b4d
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@ -3652,6 +3700,11 @@
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#define PCI_DEVICE_ID_INTEL_TGP_GSPI4 0xa0fe
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#define PCI_DEVICE_ID_INTEL_TGP_GSPI5 0xa0de
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#define PCI_DEVICE_ID_INTEL_TGP_GSPI6 0xa0df
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#define PCI_DEVICE_ID_INTEL_TGP_H_SPI0 0x43a4
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#define PCI_DEVICE_ID_INTEL_TGP_H_GSPI0 0x43aa
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#define PCI_DEVICE_ID_INTEL_TGP_H_GSPI1 0x43ab
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#define PCI_DEVICE_ID_INTEL_TGP_H_GSPI2 0x43fb
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#define PCI_DEVICE_ID_INTEL_TGP_H_GSPI3 0x43fd
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#define PCI_DEVICE_ID_INTEL_MCC_SPI0 0x4b24
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#define PCI_DEVICE_ID_INTEL_MCC_GSPI0 0x4b2a
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#define PCI_DEVICE_ID_INTEL_MCC_GSPI1 0x4b2b
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@ -3788,6 +3841,8 @@
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#define PCI_DEVICE_ID_INTEL_TGL_GT2 0xFF20
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#define PCI_DEVICE_ID_INTEL_TGL_GT2_Y 0x9A40
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#define PCI_DEVICE_ID_INTEL_TGL_GT0 0x9A7F
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#define PCI_DEVICE_ID_INTEL_TGL_GT1_H_32 0x9A60
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#define PCI_DEVICE_ID_INTEL_TGL_GT1_H_16 0x9A68
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#define PCI_DEVICE_ID_INTEL_TGL_GT2_ULT 0x9A49
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#define PCI_DEVICE_ID_INTEL_TGL_GT3_ULT 0x9A52
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#define PCI_DEVICE_ID_INTEL_TGL_GT2_ULX 0x9A40
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@ -3884,6 +3939,8 @@
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#define PCI_DEVICE_ID_INTEL_TGL_ID_U_4_2 0x9A14
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#define PCI_DEVICE_ID_INTEL_TGL_ID_Y_2_2 0x9A02
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#define PCI_DEVICE_ID_INTEL_TGL_ID_Y_4_2 0x9A12
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#define PCI_DEVICE_ID_INTEL_TGL_ID_H_6_1 0x9A26
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#define PCI_DEVICE_ID_INTEL_TGL_ID_H_8_1 0x9A36
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#define PCI_DEVICE_ID_INTEL_EHL_ID_0 0x4510
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#define PCI_DEVICE_ID_INTEL_EHL_ID_1 0x4522
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#define PCI_DEVICE_ID_INTEL_EHL_ID_1A 0x4538
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@ -3947,6 +4004,7 @@
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#define PCI_DEVICE_ID_INTEL_CMP_SMBUS 0x02a3
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#define PCI_DEVICE_ID_INTEL_CMP_H_SMBUS 0x06a3
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#define PCI_DEVICE_ID_INTEL_TGP_LP_SMBUS 0xa0a3
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#define PCI_DEVICE_ID_INTEL_TGP_H_SMBUS 0x43a3
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#define PCI_DEVICE_ID_INTEL_MCC_SMBUS 0x4b23
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#define PCI_DEVICE_ID_INTEL_JSP_SMBUS 0x4da3
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#define PCI_DEVICE_ID_INTEL_ADP_P_SMBUS 0xa0a3
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@ -3975,6 +4033,8 @@
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#define PCI_DEVICE_ID_INTEL_CMP_H_XHCI 0x06ed
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#define PCI_DEVICE_ID_INTEL_TGP_LP_XHCI 0xa0ed
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#define PCI_DEVICE_ID_INTEL_TGP_TCSS_XHCI 0x9a13
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#define PCI_DEVICE_ID_INTEL_TGP_H_XHCI 0x43ed
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#define PCI_DEVICE_ID_INTEL_TGP_H_TCSS_XHCI 0x9a17
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#define PCI_DEVICE_ID_INTEL_MCC_XHCI 0x4b7d
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#define PCI_DEVICE_ID_INTEL_JSP_XHCI 0x4ded
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#define PCI_DEVICE_ID_INTEL_ADP_P_XHCI 0x51ed
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@ -3996,6 +4056,7 @@
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#define PCI_DEVICE_ID_INTEL_CMP_P2SB 0x02a0
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#define PCI_DEVICE_ID_INTEL_CMP_H_P2SB 0x06a0
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#define PCI_DEVICE_ID_INTEL_TGL_P2SB 0xa0a0
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#define PCI_DEVICE_ID_INTEL_TGL_H_P2SB 0x43a0
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#define PCI_DEVICE_ID_INTEL_EHL_P2SB 0x4b20
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#define PCI_DEVICE_ID_INTEL_JSP_P2SB 0x4da0
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#define PCI_DEVICE_ID_INTEL_ADP_P_P2SB 0x7a20
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#define PCI_DEVICE_ID_INTEL_CMP_SRAM 0x02ef
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#define PCI_DEVICE_ID_INTEL_CMP_H_SRAM 0x06ef
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#define PCI_DEVICE_ID_INTEL_TGL_SRAM 0xa0ef
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#define PCI_DEVICE_ID_INTEL_TGL_H_SRAM 0x43ef
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#define PCI_DEVICE_ID_INTEL_MCC_SRAM 0x4b7f
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#define PCI_DEVICE_ID_INTEL_JSP_SRAM 0x4def
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#define PCI_DEVICE_ID_INTEL_ADP_P_SRAM 0x7a6f
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#define PCI_DEVICE_ID_INTEL_CMP_H_AUDIO 0x06c8
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#define PCI_DEVICE_ID_INTEL_BSW_AUDIO 0x2284
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#define PCI_DEVICE_ID_INTEL_TGL_AUDIO 0xa0c8
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#define PCI_DEVICE_ID_INTEL_TGL_H_AUDIO 0x43c8
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#define PCI_DEVICE_ID_INTEL_MCC_AUDIO 0x4b55
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#define PCI_DEVICE_ID_INTEL_JSP_AUDIO 0x4dc8
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#define PCI_DEVICE_ID_INTEL_ADP_S_AUDIO_1 0x7ad0
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#define PCI_DEVICE_ID_INTEL_CMP_CSE0 0x02e0
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#define PCI_DEVICE_ID_INTEL_CMP_H_CSE0 0x06e0
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#define PCI_DEVICE_ID_INTEL_TGL_CSE0 0xa0e0
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#define PCI_DEVICE_ID_INTEL_TGL_H_CSE0 0x43e0
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#define PCI_DEVICE_ID_INTEL_MCC_CSE0 0x4b70
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#define PCI_DEVICE_ID_INTEL_MCC_CSE1 0x4b71
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#define PCI_DEVICE_ID_INTEL_MCC_CSE2 0x4b74
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#define PCI_DEVICE_ID_INTEL_CMP_H_XDCI 0x06ee
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#define PCI_DEVICE_ID_INTEL_TGP_LP_XDCI 0xa0ee
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#define PCI_DEVICE_ID_INTEL_TGP_TCSS_XDCI 0x9a15
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#define PCI_DEVICE_ID_INTEL_TGP_H_XDCI 0x43ee
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#define PCI_DEVICE_ID_INTEL_MCC_XDCI 0x4b7e
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#define PCI_DEVICE_ID_INTEL_JSP_XDCI 0x4dee
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#define PCI_DEVICE_ID_INTEL_ADP_P_XDCI 0x51ee
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#define PCI_DEVICE_ID_INTEL_TGL_TBT_RP1 0x9a25
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#define PCI_DEVICE_ID_INTEL_TGL_TBT_RP2 0x9a27
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#define PCI_DEVICE_ID_INTEL_TGL_TBT_RP3 0x9a29
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#define PCI_DEVICE_ID_INTEL_TGL_H_TBT_RP0 0x9a2b
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#define PCI_DEVICE_ID_INTEL_TGL_H_TBT_RP1 0x9a2d
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#define PCI_DEVICE_ID_INTEL_TGL_H_TBT_RP2 0x9a2f
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#define PCI_DEVICE_ID_INTEL_TGL_H_TBT_RP3 0x9a31
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#define PCI_DEVICE_ID_INTEL_ADL_TBT_RP0 0x466e
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#define PCI_DEVICE_ID_INTEL_ADL_TBT_RP1 0x463f
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#define PCI_DEVICE_ID_INTEL_ADL_TBT_RP2 0x462f
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#define PCI_DEVICE_ID_INTEL_ADL_TBT_RP3 0x461f
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#define PCI_DEVICE_ID_INTEL_TGL_TBT_DMA0 0x9a1b
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#define PCI_DEVICE_ID_INTEL_TGL_TBT_DMA1 0x9a1d
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#define PCI_DEVICE_ID_INTEL_TGL_H_TBT_DMA0 0x9a1f
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#define PCI_DEVICE_ID_INTEL_TGL_H_TBT_DMA1 0x9a21
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#define PCI_DEVICE_ID_INTEL_ADL_TBT_DMA0 0x463e
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#define PCI_DEVICE_ID_INTEL_ADL_TBT_DMA1 0x466d
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#define PCI_DEVICE_ID_GrP_6SERIES_2_WIFI 0x7af0
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#define PCI_DEVICE_ID_INTEL_TGL_IPU 0x9a19
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#define PCI_DEVICE_ID_INTEL_TGL_H_IPU 0x9a39
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#define PCI_DEVICE_ID_INTEL_JSL_IPU 0x4e19
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#define PCI_DEVICE_ID_INTEL_ADL_IPU 0x465d
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#define PCI_DEVICE_ID_INTEL_TGL_CNVI_BT_1 0xa0f6
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#define PCI_DEVICE_ID_INTEL_TGL_CNVI_BT_2 0xa0f7
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#define PCI_DEVICE_ID_INTEL_TGL_CNVI_BT_3 0xa0f8
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#define PCI_DEVICE_ID_INTEL_TGL_H_CNVI_WIFI_0 0x43f0
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#define PCI_DEVICE_ID_INTEL_TGL_H_CNVI_WIFI_1 0x43f1
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#define PCI_DEVICE_ID_INTEL_TGL_H_CNVI_WIFI_2 0x43f2
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#define PCI_DEVICE_ID_INTEL_TGL_H_CNVI_WIFI_3 0x43f3
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#define PCI_DEVICE_ID_INTEL_TGL_H_CNVI_BT_0 0x43f5
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#define PCI_DEVICE_ID_INTEL_TGL_H_CNVI_BT_1 0x43f6
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#define PCI_DEVICE_ID_INTEL_TGL_H_CNVI_BT_2 0x43f7
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#define PCI_VENDOR_ID_COMPUTONE 0x8e0e
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#define PCI_DEVICE_ID_COMPUTONE_IP2EX 0x0291
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PCI_DEVICE_ID_INTEL_TGL_CNVI_WIFI_1,
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PCI_DEVICE_ID_INTEL_TGL_CNVI_WIFI_2,
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PCI_DEVICE_ID_INTEL_TGL_CNVI_WIFI_3,
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PCI_DEVICE_ID_INTEL_TGL_H_CNVI_WIFI_0,
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PCI_DEVICE_ID_INTEL_TGL_H_CNVI_WIFI_1,
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PCI_DEVICE_ID_INTEL_TGL_H_CNVI_WIFI_2,
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PCI_DEVICE_ID_INTEL_TGL_H_CNVI_WIFI_3,
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0
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};
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PCI_DEVICE_ID_INTEL_TGL_CNVI_BT_1,
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PCI_DEVICE_ID_INTEL_TGL_CNVI_BT_2,
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PCI_DEVICE_ID_INTEL_TGL_CNVI_BT_3,
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PCI_DEVICE_ID_INTEL_TGL_H_CNVI_BT_0,
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PCI_DEVICE_ID_INTEL_TGL_H_CNVI_BT_1,
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PCI_DEVICE_ID_INTEL_TGL_H_CNVI_BT_2,
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0
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};
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PCI_DEVICE_ID_INTEL_CMP_CSE0,
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PCI_DEVICE_ID_INTEL_CMP_H_CSE0,
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PCI_DEVICE_ID_INTEL_TGL_CSE0,
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PCI_DEVICE_ID_INTEL_TGL_H_CSE0,
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PCI_DEVICE_ID_INTEL_MCC_CSE0,
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PCI_DEVICE_ID_INTEL_MCC_CSE1,
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PCI_DEVICE_ID_INTEL_MCC_CSE2,
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PCI_DEVICE_ID_INTEL_CMP_H_AUDIO,
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PCI_DEVICE_ID_INTEL_ICL_AUDIO,
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PCI_DEVICE_ID_INTEL_TGL_AUDIO,
|
||||
PCI_DEVICE_ID_INTEL_TGL_H_AUDIO,
|
||||
PCI_DEVICE_ID_INTEL_MCC_AUDIO,
|
||||
PCI_DEVICE_ID_INTEL_JSP_AUDIO,
|
||||
PCI_DEVICE_ID_INTEL_ADP_P_AUDIO,
|
||||
|
|
|
@ -269,6 +269,8 @@ static const unsigned short pci_device_ids[] = {
|
|||
PCI_DEVICE_ID_INTEL_CML_GT2_H_R0,
|
||||
PCI_DEVICE_ID_INTEL_CML_GT2_H_R1,
|
||||
PCI_DEVICE_ID_INTEL_TGL_GT0,
|
||||
PCI_DEVICE_ID_INTEL_TGL_GT1_H_32,
|
||||
PCI_DEVICE_ID_INTEL_TGL_GT1_H_16,
|
||||
PCI_DEVICE_ID_INTEL_TGL_GT2_ULT,
|
||||
PCI_DEVICE_ID_INTEL_TGL_GT2_ULX,
|
||||
PCI_DEVICE_ID_INTEL_TGL_GT3_ULT,
|
||||
|
|
|
@ -33,6 +33,7 @@ static const unsigned short pci_device_ids[] = {
|
|||
PCI_DEVICE_ID_INTEL_CMP_H_AUDIO,
|
||||
PCI_DEVICE_ID_INTEL_BSW_AUDIO,
|
||||
PCI_DEVICE_ID_INTEL_TGL_AUDIO,
|
||||
PCI_DEVICE_ID_INTEL_TGL_H_AUDIO,
|
||||
PCI_DEVICE_ID_INTEL_MCC_AUDIO,
|
||||
PCI_DEVICE_ID_INTEL_JSP_AUDIO,
|
||||
PCI_DEVICE_ID_INTEL_ADP_P_AUDIO,
|
||||
|
|
|
@ -230,6 +230,13 @@ static const unsigned short pci_device_ids[] = {
|
|||
PCI_DEVICE_ID_INTEL_TGP_I2C5,
|
||||
PCI_DEVICE_ID_INTEL_TGP_I2C6,
|
||||
PCI_DEVICE_ID_INTEL_TGP_I2C7,
|
||||
PCI_DEVICE_ID_INTEL_TGP_H_I2C0,
|
||||
PCI_DEVICE_ID_INTEL_TGP_H_I2C1,
|
||||
PCI_DEVICE_ID_INTEL_TGP_H_I2C2,
|
||||
PCI_DEVICE_ID_INTEL_TGP_H_I2C3,
|
||||
PCI_DEVICE_ID_INTEL_TGP_H_I2C4,
|
||||
PCI_DEVICE_ID_INTEL_TGP_H_I2C5,
|
||||
PCI_DEVICE_ID_INTEL_TGP_H_I2C6,
|
||||
PCI_DEVICE_ID_INTEL_MCC_I2C0,
|
||||
PCI_DEVICE_ID_INTEL_MCC_I2C1,
|
||||
PCI_DEVICE_ID_INTEL_MCC_I2C2,
|
||||
|
|
|
@ -13,6 +13,7 @@ struct device_operations ipu_pci_ops = {
|
|||
|
||||
static const uint16_t pci_device_ids[] = {
|
||||
PCI_DEVICE_ID_INTEL_TGL_IPU,
|
||||
PCI_DEVICE_ID_INTEL_TGL_H_IPU,
|
||||
PCI_DEVICE_ID_INTEL_JSL_IPU,
|
||||
PCI_DEVICE_ID_INTEL_ADL_IPU,
|
||||
0
|
||||
|
|
|
@ -226,6 +226,15 @@ static const unsigned short pci_device_ids[] = {
|
|||
PCI_DEVICE_ID_INTEL_TGP_ESPI_24,
|
||||
PCI_DEVICE_ID_INTEL_TGP_ESPI_25,
|
||||
PCI_DEVICE_ID_INTEL_TGP_ESPI_26,
|
||||
PCI_DEVICE_ID_INTEL_TGP_H_ESPI_B560,
|
||||
PCI_DEVICE_ID_INTEL_TGP_H_ESPI_H510,
|
||||
PCI_DEVICE_ID_INTEL_TGP_H_ESPI_H570,
|
||||
PCI_DEVICE_ID_INTEL_TGP_H_ESPI_Q570,
|
||||
PCI_DEVICE_ID_INTEL_TGP_H_ESPI_W580,
|
||||
PCI_DEVICE_ID_INTEL_TGP_H_ESPI_Z590,
|
||||
PCI_DEVICE_ID_INTEL_TGP_H_ESPI_HM570,
|
||||
PCI_DEVICE_ID_INTEL_TGP_H_ESPI_QM580,
|
||||
PCI_DEVICE_ID_INTEL_TGP_H_ESPI_WM590,
|
||||
PCI_DEVICE_ID_INTEL_MCC_ESPI_0,
|
||||
PCI_DEVICE_ID_INTEL_MCC_ESPI_1,
|
||||
PCI_DEVICE_ID_INTEL_MCC_BASE_ESPI,
|
||||
|
|
|
@ -189,6 +189,7 @@ static const unsigned short pci_device_ids[] = {
|
|||
PCI_DEVICE_ID_INTEL_CMP_P2SB,
|
||||
PCI_DEVICE_ID_INTEL_CMP_H_P2SB,
|
||||
PCI_DEVICE_ID_INTEL_TGL_P2SB,
|
||||
PCI_DEVICE_ID_INTEL_TGL_H_P2SB,
|
||||
PCI_DEVICE_ID_INTEL_EHL_P2SB,
|
||||
PCI_DEVICE_ID_INTEL_JSP_P2SB,
|
||||
PCI_DEVICE_ID_INTEL_ADP_P_P2SB,
|
||||
|
|
|
@ -274,6 +274,30 @@ static const unsigned short pcie_device_ids[] = {
|
|||
PCI_DEVICE_ID_INTEL_TGP_LP_PCIE_RP14,
|
||||
PCI_DEVICE_ID_INTEL_TGP_LP_PCIE_RP15,
|
||||
PCI_DEVICE_ID_INTEL_TGP_LP_PCIE_RP16,
|
||||
PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP1,
|
||||
PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP2,
|
||||
PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP3,
|
||||
PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP4,
|
||||
PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP5,
|
||||
PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP6,
|
||||
PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP7,
|
||||
PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP8,
|
||||
PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP9,
|
||||
PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP10,
|
||||
PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP11,
|
||||
PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP12,
|
||||
PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP13,
|
||||
PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP14,
|
||||
PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP15,
|
||||
PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP16,
|
||||
PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP17,
|
||||
PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP18,
|
||||
PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP19,
|
||||
PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP20,
|
||||
PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP21,
|
||||
PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP22,
|
||||
PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP23,
|
||||
PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP24,
|
||||
PCI_DEVICE_ID_INTEL_MCC_PCIE_RP1,
|
||||
PCI_DEVICE_ID_INTEL_MCC_PCIE_RP2,
|
||||
PCI_DEVICE_ID_INTEL_MCC_PCIE_RP3,
|
||||
|
|
|
@ -95,6 +95,7 @@ static const unsigned short pci_device_ids[] = {
|
|||
PCI_DEVICE_ID_INTEL_CMP_PMC,
|
||||
PCI_DEVICE_ID_INTEL_CMP_H_PMC,
|
||||
PCI_DEVICE_ID_INTEL_TGP_PMC,
|
||||
PCI_DEVICE_ID_INTEL_TGP_H_PMC,
|
||||
PCI_DEVICE_ID_INTEL_MCC_PMC,
|
||||
PCI_DEVICE_ID_INTEL_JSP_PMC,
|
||||
PCI_DEVICE_ID_INTEL_ADP_P_PMC,
|
||||
|
|
|
@ -45,6 +45,7 @@ static const unsigned short pci_device_ids[] = {
|
|||
PCI_DEVICE_ID_INTEL_TGP_SATA,
|
||||
PCI_DEVICE_ID_INTEL_TGP_PREMIUM_SATA,
|
||||
PCI_DEVICE_ID_INTEL_TGP_COMPAT_SATA,
|
||||
PCI_DEVICE_ID_INTEL_TGP_H_SATA,
|
||||
PCI_DEVICE_ID_INTEL_MCC_AHCI_SATA,
|
||||
PCI_DEVICE_ID_INTEL_JSP_SATA_1,
|
||||
PCI_DEVICE_ID_INTEL_JSP_SATA_2,
|
||||
|
|
|
@ -85,6 +85,7 @@ static const unsigned short pci_device_ids[] = {
|
|||
PCI_DEVICE_ID_INTEL_CMP_SMBUS,
|
||||
PCI_DEVICE_ID_INTEL_CMP_H_SMBUS,
|
||||
PCI_DEVICE_ID_INTEL_TGP_LP_SMBUS,
|
||||
PCI_DEVICE_ID_INTEL_TGP_H_SMBUS,
|
||||
PCI_DEVICE_ID_INTEL_MCC_SMBUS,
|
||||
PCI_DEVICE_ID_INTEL_JSP_SMBUS,
|
||||
PCI_DEVICE_ID_INTEL_ADP_P_SMBUS,
|
||||
|
|
|
@ -79,6 +79,11 @@ static const unsigned short pci_device_ids[] = {
|
|||
PCI_DEVICE_ID_INTEL_TGP_GSPI4,
|
||||
PCI_DEVICE_ID_INTEL_TGP_GSPI5,
|
||||
PCI_DEVICE_ID_INTEL_TGP_GSPI6,
|
||||
PCI_DEVICE_ID_INTEL_TGP_H_SPI0,
|
||||
PCI_DEVICE_ID_INTEL_TGP_H_GSPI0,
|
||||
PCI_DEVICE_ID_INTEL_TGP_H_GSPI1,
|
||||
PCI_DEVICE_ID_INTEL_TGP_H_GSPI2,
|
||||
PCI_DEVICE_ID_INTEL_TGP_H_GSPI3,
|
||||
PCI_DEVICE_ID_INTEL_MCC_SPI0,
|
||||
PCI_DEVICE_ID_INTEL_MCC_GSPI0,
|
||||
PCI_DEVICE_ID_INTEL_MCC_GSPI1,
|
||||
|
|
|
@ -39,6 +39,7 @@ static const unsigned short pci_device_ids[] = {
|
|||
PCI_DEVICE_ID_INTEL_CMP_SRAM,
|
||||
PCI_DEVICE_ID_INTEL_CMP_H_SRAM,
|
||||
PCI_DEVICE_ID_INTEL_TGL_SRAM,
|
||||
PCI_DEVICE_ID_INTEL_TGL_H_SRAM,
|
||||
PCI_DEVICE_ID_INTEL_MCC_SRAM,
|
||||
PCI_DEVICE_ID_INTEL_JSP_SRAM,
|
||||
PCI_DEVICE_ID_INTEL_ADP_P_SRAM,
|
||||
|
|
|
@ -375,6 +375,8 @@ static const unsigned short systemagent_ids[] = {
|
|||
PCI_DEVICE_ID_INTEL_TGL_ID_U_4_2,
|
||||
PCI_DEVICE_ID_INTEL_TGL_ID_Y_2_2,
|
||||
PCI_DEVICE_ID_INTEL_TGL_ID_Y_4_2,
|
||||
PCI_DEVICE_ID_INTEL_TGL_ID_H_6_1,
|
||||
PCI_DEVICE_ID_INTEL_TGL_ID_H_8_1,
|
||||
PCI_DEVICE_ID_INTEL_EHL_ID_0,
|
||||
PCI_DEVICE_ID_INTEL_EHL_ID_1,
|
||||
PCI_DEVICE_ID_INTEL_EHL_ID_1A,
|
||||
|
|
|
@ -379,6 +379,10 @@ static const unsigned short pci_device_ids[] = {
|
|||
PCI_DEVICE_ID_INTEL_TGP_UART0,
|
||||
PCI_DEVICE_ID_INTEL_TGP_UART1,
|
||||
PCI_DEVICE_ID_INTEL_TGP_UART2,
|
||||
PCI_DEVICE_ID_INTEL_TGP_H_UART0,
|
||||
PCI_DEVICE_ID_INTEL_TGP_H_UART1,
|
||||
PCI_DEVICE_ID_INTEL_TGP_H_UART2,
|
||||
PCI_DEVICE_ID_INTEL_TGP_H_UART3,
|
||||
PCI_DEVICE_ID_INTEL_MCC_UART0,
|
||||
PCI_DEVICE_ID_INTEL_MCC_UART1,
|
||||
PCI_DEVICE_ID_INTEL_MCC_UART2,
|
||||
|
|
|
@ -62,6 +62,8 @@ static void tbt_dma_fill_ssdt(const struct device *dev)
|
|||
static const unsigned short pci_device_ids[] = {
|
||||
PCI_DEVICE_ID_INTEL_TGL_TBT_DMA0,
|
||||
PCI_DEVICE_ID_INTEL_TGL_TBT_DMA1,
|
||||
PCI_DEVICE_ID_INTEL_TGL_H_TBT_DMA0,
|
||||
PCI_DEVICE_ID_INTEL_TGL_H_TBT_DMA1,
|
||||
PCI_DEVICE_ID_INTEL_ADL_TBT_DMA0,
|
||||
PCI_DEVICE_ID_INTEL_ADL_TBT_DMA1,
|
||||
0
|
||||
|
|
|
@ -27,6 +27,7 @@ static struct device_operations usb4_xhci_ops = {
|
|||
|
||||
static const unsigned short pci_device_ids[] = {
|
||||
PCI_DEVICE_ID_INTEL_TGP_TCSS_XHCI,
|
||||
PCI_DEVICE_ID_INTEL_TGP_H_TCSS_XHCI,
|
||||
PCI_DEVICE_ID_INTEL_ADP_TCSS_XHCI,
|
||||
0
|
||||
};
|
||||
|
|
|
@ -36,6 +36,7 @@ static const unsigned short pci_device_ids[] = {
|
|||
PCI_DEVICE_ID_INTEL_CMP_LP_XDCI,
|
||||
PCI_DEVICE_ID_INTEL_CMP_H_XDCI,
|
||||
PCI_DEVICE_ID_INTEL_TGP_LP_XDCI,
|
||||
PCI_DEVICE_ID_INTEL_TGP_H_XDCI,
|
||||
PCI_DEVICE_ID_INTEL_MCC_XDCI,
|
||||
PCI_DEVICE_ID_INTEL_JSP_XDCI,
|
||||
PCI_DEVICE_ID_INTEL_ADP_P_XDCI,
|
||||
|
|
|
@ -119,6 +119,7 @@ static const unsigned short pci_device_ids[] = {
|
|||
PCI_DEVICE_ID_INTEL_CMP_LP_XHCI,
|
||||
PCI_DEVICE_ID_INTEL_CMP_H_XHCI,
|
||||
PCI_DEVICE_ID_INTEL_TGP_LP_XHCI,
|
||||
PCI_DEVICE_ID_INTEL_TGP_H_XHCI,
|
||||
PCI_DEVICE_ID_INTEL_MCC_XHCI,
|
||||
PCI_DEVICE_ID_INTEL_JSP_XHCI,
|
||||
PCI_DEVICE_ID_INTEL_ADP_P_XHCI,
|
||||
|
|
|
@ -35,6 +35,8 @@ static struct {
|
|||
{ PCI_DEVICE_ID_INTEL_TGL_ID_U_4_2, "Tigerlake-U-4-2" },
|
||||
{ PCI_DEVICE_ID_INTEL_TGL_ID_Y_2_2, "Tigerlake-Y-2-2" },
|
||||
{ PCI_DEVICE_ID_INTEL_TGL_ID_Y_4_2, "Tigerlake-Y-4-2" },
|
||||
{ PCI_DEVICE_ID_INTEL_TGL_ID_H_6_1, "Tigerlake-H-6-1" },
|
||||
{ PCI_DEVICE_ID_INTEL_TGL_ID_H_8_1, "Tigerlake-H-8-1" },
|
||||
};
|
||||
|
||||
static struct {
|
||||
|
@ -73,6 +75,15 @@ static struct {
|
|||
{ PCI_DEVICE_ID_INTEL_TGP_ESPI_24, "Tigerlake-Base SKU" },
|
||||
{ PCI_DEVICE_ID_INTEL_TGP_ESPI_25, "Tigerlake-Base SKU" },
|
||||
{ PCI_DEVICE_ID_INTEL_TGP_ESPI_26, "Tigerlake-Base SKU" },
|
||||
{ PCI_DEVICE_ID_INTEL_TGP_H_ESPI_B560, "Tigerlake-H B560" },
|
||||
{ PCI_DEVICE_ID_INTEL_TGP_H_ESPI_H510, "Tigerlake-H H510" },
|
||||
{ PCI_DEVICE_ID_INTEL_TGP_H_ESPI_H570, "Tigerlake-H H570" },
|
||||
{ PCI_DEVICE_ID_INTEL_TGP_H_ESPI_Q570, "Tigerlake-H Q570" },
|
||||
{ PCI_DEVICE_ID_INTEL_TGP_H_ESPI_W580, "Tigerlake-H W580" },
|
||||
{ PCI_DEVICE_ID_INTEL_TGP_H_ESPI_Z590, "Tigerlake-H Z590" },
|
||||
{ PCI_DEVICE_ID_INTEL_TGP_H_ESPI_HM570, "Tigerlake-H HM570" },
|
||||
{ PCI_DEVICE_ID_INTEL_TGP_H_ESPI_QM580, "Tigerlake-H QM580" },
|
||||
{ PCI_DEVICE_ID_INTEL_TGP_H_ESPI_WM590, "Tigerlake-H WM590" },
|
||||
};
|
||||
|
||||
static struct {
|
||||
|
@ -80,6 +91,8 @@ static struct {
|
|||
const char *name;
|
||||
} igd_table[] = {
|
||||
{ PCI_DEVICE_ID_INTEL_TGL_GT0, "Tigerlake U GT0" },
|
||||
{ PCI_DEVICE_ID_INTEL_TGL_GT1_H_32, "Tigerlake H GT1 32EU" },
|
||||
{ PCI_DEVICE_ID_INTEL_TGL_GT1_H_16, "Tigerlake H GT1 16EU" },
|
||||
{ PCI_DEVICE_ID_INTEL_TGL_GT2_ULT, "Tigerlake U GT2" },
|
||||
{ PCI_DEVICE_ID_INTEL_TGL_GT2_ULX, "Tigerlake Y GT2" },
|
||||
{ PCI_DEVICE_ID_INTEL_TGL_GT3_ULT, "Tigerlake U GT3" },
|
||||
|
|
Loading…
Reference in New Issue