This patch introduces 4k CAR size granularity for the AMD x86 CAR code.
For the old supported CAR sizes, the newly generated code is equivalent, so it should be a no-brainer. Benefits: * a nice code size reduction * less #ifdef clutter for Family 10h * paranoid checks for CAR size * clear abstractions This has been tested by Marc Jones and Jordan Crouse. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Marc Jones <marc.jones@amd.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3043 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Carl-Daniel Hailfinger
parent
2e152be16e
commit
1923fc41be
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@ -2,6 +2,7 @@
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* This file is part of the LinuxBIOS project.
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*
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* Copyright (C) 2005-2007 Advanced Micro Devices, Inc.
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* Copyright (C) 2008 Carl-Daniel Hailfinger
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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@ -120,82 +121,70 @@ clear_fixed_var_mtrr:
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jmp clear_fixed_var_mtrr
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clear_fixed_var_mtrr_out:
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#if CacheSize == 0x10000
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/* enable caching for 64K using fixed mtrr */
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movl $0x268, %ecx /* fix4k_c0000*/
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#if CAR_FAM10 == 1
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movl $0x1e1e1e1e, %edx /* WB MEM type */
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#else
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movl $0x06060606, %edx /* WB IO type */
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#endif
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/* 0x06 is the WB IO type for a given 4k segment.
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* 0x1e is the MEM IO type for a given 4k segment (K10 and above).
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* segs is the number of 4k segments in the area of the particular
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* register we want to use for CAR.
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* reg is the register where the IO type should be stored.
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*/
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.macro extractmask segs, reg
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.if \segs <= 0
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/* The xorl here is superfluous because at the point of first execution
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* of this macro, %eax and %edx are cleared. Later invocations of this
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* macro will have a monotonically increasing segs parameter.
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*/
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xorl \reg, \reg
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#if CAR_FAM10 == 1
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.elseif \segs == 1
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movl $0x1e000000, \reg /* WB MEM type */
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.elseif \segs == 2
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movl $0x1e1e0000, \reg /* WB MEM type */
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.elseif \segs == 3
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movl $0x1e1e1e00, \reg /* WB MEM type */
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.elseif \segs >= 4
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movl $0x1e1e1e1e, \reg /* WB MEM type */
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#else
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.elseif \segs == 1
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movl $0x06000000, \reg /* WB IO type */
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.elseif \segs == 2
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movl $0x06060000, \reg /* WB IO type */
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.elseif \segs == 3
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movl $0x06060600, \reg /* WB IO type */
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.elseif \segs >= 4
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movl $0x06060606, \reg /* WB IO type */
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#endif
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.endif
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.endm
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movl %edx, %eax
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wrmsr
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movl $0x269, %ecx
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wrmsr
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/* size is the cache size in bytes we want to use for CAR.
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* windowoffset is the 32k-aligned window into CAR size
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*/
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.macro simplemask carsize, windowoffset
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extractmask (((\carsize - \windowoffset) / 0x1000) - 4), %eax
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extractmask (((\carsize - \windowoffset) / 0x1000)), %edx
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.endm
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#if CacheSize > 0x10000
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#error Invalid CAR size, must be at most 64k.
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#endif
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#if CacheSize < 0x1000
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#error Invalid CAR size, must be at least 4k. This is a processor limitation.
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#endif
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#if (CacheSize & (0x1000 - 1))
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#error Invalid CAR size, is not a multiple of 4k. This is a processor limitation.
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#endif
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#if CacheSize == 0xc000
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/* enable caching for 16K using fixed mtrr */
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movl $0x268, %ecx /* fix4k_c4000*/
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#if CAR_FAM10 == 1
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movl $0x1e1e1e1e, %edx /* WB MEM type */
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#else
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movl $0x06060606, %edx /* WB IO type */
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#endif
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xorl %eax, %eax
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wrmsr
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/* enable caching for 32K using fixed mtrr */
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movl $0x269, %ecx /* fix4k_c8000*/
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#if CAR_FAM10 == 1
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movl $0x1e1e1e1e, %edx /* WB MEM type */
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#else
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movl $0x06060606, %edx /* WB IO type */
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#endif
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movl %edx, %eax
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wrmsr
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#if CacheSize > 0x8000
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/* enable caching for 32K-64K using fixed mtrr */
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movl $0x268, %ecx /* fix4k_c0000*/
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simplemask CacheSize, 0x8000
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wrmsr
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#endif
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#if CacheSize == 0x8000
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/* enable caching for 32K using fixed mtrr */
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movl $0x269, %ecx /* fix4k_c8000*/
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#if CAR_FAM10 == 1
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movl $0x1e1e1e1e, %edx /* WB MEM type */
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#else
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movl $0x06060606, %edx /* WB IO type */
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#endif
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movl %edx, %eax
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/* enable caching for 0-32K using fixed mtrr */
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movl $0x269, %ecx /* fix4k_c8000*/
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simplemask CacheSize, 0
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wrmsr
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#endif
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#if CacheSize < 0x8000
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/* enable caching for 16K/8K/4K using fixed mtrr */
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movl $0x269, %ecx /* fix4k_cc000*/
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#if CacheSize == 0x4000
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#if CAR_FAM10 == 1
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movl $0x1e1e1e1e, %edx /* WB MEM type */
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#else
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movl $0x06060606, %edx /* WB IO type */
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#endif
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#endif
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#if CacheSize == 0x2000
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#if CAR_FAM10 == 1
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movl $0x1e1e0000, %edx /* WB MEM type */
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#else
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movl $0x06060000, %edx /* WB IO type */
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#endif
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#endif
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#if CacheSize == 0x1000
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#if CAR_FAM10 == 1
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movl $0x1e000000, %edx /* WB MEM type */
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#else
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movl $0x06000000, %edx /* WB IO type */
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#endif
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#endif
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xorl %eax, %eax
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wrmsr
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#endif
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/* enable memory access for first MBs using top_mem */
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movl $TOP_MEM, %ecx
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