{device,drivers,lib,mb,nb}: Use only one space after 'if'
Change-Id: I390191fb58605d1bd6a2e5d19a9dfa7c8493e6b2 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/26063 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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@ -723,7 +723,7 @@ static void avoid_fixed_resources(const struct device *dev)
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if (res->base > lim->base)
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lim->base = res->base;
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if (res->limit < lim->limit)
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if (res->limit < lim->limit)
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lim->limit = res->limit;
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}
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@ -84,7 +84,7 @@ static void init_fan_ctrl (void *base_adr)
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(hwilib_get_field(FF_FreezeDis, &freeze_disable, 1) == 1)) {
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if (!fan_req)
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mask = 1;
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else if (fan_req && !freeze_disable)
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else if (fan_req && !freeze_disable)
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mask = 2;
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else
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mask = 3;
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@ -102,7 +102,7 @@ static int ram_bitset_nodie(unsigned long start)
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failed = (value2 != value);
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failures |= failed;
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if (failed && !verbose) {
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if (failed && !verbose) {
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printk(BIOS_ERR, "0x%08lx wr: 0x%08lx rd: 0x%08lx FAIL\n",
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start + addr, value, value2);
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}
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@ -105,7 +105,7 @@ void board_FCH_InitReset(struct sysinfo *cb_NA, FCH_RESET_DATA_BLOCK *FchParams_
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/* Read SATA speed setting from CMOS */
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enum cb_err ret;
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ret = get_option(&FchParams_reset->SataSetMaxGen2, "sata_speed");
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if (ret != CB_SUCCESS) {
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if (ret != CB_SUCCESS) {
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FchParams_reset->SataSetMaxGen2 = 0;
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printk(BIOS_DEBUG, "ERROR: cannot read CMOS setting, falling back to default. Error code: %x\n", (int)ret);
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}
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@ -2090,7 +2090,7 @@ static u16 CompareDQSTestPattern_D(struct MCTStatStruc *pMCTstat, struct DCTStat
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if (pDCTstat->Direction == DQS_READDIR) {
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if (BeatCnt != 0) {
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if (((value_r >> j) & 0xff) != ((value_r_test >> j) & 0xff)) {
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if (((value_r >> j) & 0xff) != ((value_r_test >> j) & 0xff)) {
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MEn1Results &= ~(1 << bytelane);
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}
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}
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@ -130,7 +130,7 @@ u16 mctGet_NVbits(u8 index)
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case NV_BYPMAX:
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#if !IS_ENABLED(CONFIG_GFXUMA)
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val = 4;
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#elif IS_ENABLED(CONFIG_GFXUMA)
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#elif IS_ENABLED(CONFIG_GFXUMA)
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val = 7;
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#endif
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break;
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