mb/google/mancomb: Add smihandler
BUG=b:182211161 TEST=builds Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com> Change-Id: I52411917d9e7e8f8d9ac5d1c9b426a58ba09f5ae Reviewed-on: https://review.coreboot.org/c/coreboot/+/51625 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Mathew King <mathewk@chromium.org>
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@ -11,6 +11,8 @@ config BOARD_SPECIFIC_OPTIONS
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select BOARD_ROMSIZE_KB_16384
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select BOARD_ROMSIZE_KB_16384
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select EC_GOOGLE_CHROMEEC
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select EC_GOOGLE_CHROMEEC
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select EC_GOOGLE_CHROMEEC_ESPI
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select EC_GOOGLE_CHROMEEC_ESPI
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select ELOG
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select ELOG_GSMI
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select HAVE_ACPI_RESUME
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select HAVE_ACPI_RESUME
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select MAINBOARD_HAS_CHROMEOS
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select MAINBOARD_HAS_CHROMEOS
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select SOC_AMD_CEZANNE
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select SOC_AMD_CEZANNE
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36
src/mainboard/google/mancomb/smihandler.c
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36
src/mainboard/google/mancomb/smihandler.c
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@ -0,0 +1,36 @@
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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#include <baseboard/variants.h>
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#include <cpu/x86/smm.h>
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#include <ec/google/chromeec/ec.h>
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#include <ec/google/chromeec/smm.h>
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#include <elog.h>
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#include <variant/ec.h>
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void mainboard_smi_gpi(u32 gpi_sts)
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{
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chromeec_smi_process_events();
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}
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void mainboard_smi_sleep(u8 slp_typ)
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{
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size_t num_gpios;
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const struct soc_amd_gpio *gpios;
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chromeec_smi_sleep(slp_typ, MAINBOARD_EC_S3_WAKE_EVENTS, MAINBOARD_EC_S5_WAKE_EVENTS);
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gpios = variant_sleep_gpio_table(&num_gpios);
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program_gpios(gpios, num_gpios);
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}
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int mainboard_smi_apmc(u8 apmc)
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{
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chromeec_smi_apmc(apmc, MAINBOARD_EC_SCI_EVENTS, MAINBOARD_EC_SMI_EVENTS);
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return 0;
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}
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void elog_gsmi_cb_mainboard_log_wake_source(void)
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{
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google_chromeec_log_events(MAINBOARD_EC_LOG_EVENTS | MAINBOARD_EC_S0IX_WAKE_EVENTS);
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}
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@ -3,3 +3,5 @@ bootblock-y += gpio.c
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ramstage-y += gpio.c
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ramstage-y += gpio.c
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verstage-y += gpio.c
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verstage-y += gpio.c
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smm-y += gpio.c
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@ -168,6 +168,11 @@ static const struct soc_amd_gpio early_gpio_table[] = {
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PAD_NF(GPIO_108, ESPI_ALERT_D1, PULL_NONE),
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PAD_NF(GPIO_108, ESPI_ALERT_D1, PULL_NONE),
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};
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};
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/* GPIO configuration for sleep */
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static const struct soc_amd_gpio sleep_gpio_table[] = {
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/* TODO: Fill sleep gpio configuration */
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};
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const struct soc_amd_gpio *__weak variant_base_gpio_table(size_t *size)
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const struct soc_amd_gpio *__weak variant_base_gpio_table(size_t *size)
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{
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{
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*size = ARRAY_SIZE(base_gpio_table);
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*size = ARRAY_SIZE(base_gpio_table);
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@ -183,3 +188,8 @@ const struct soc_amd_gpio *__weak variant_early_gpio_table(size_t *size)
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*size = ARRAY_SIZE(early_gpio_table);
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*size = ARRAY_SIZE(early_gpio_table);
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return early_gpio_table;
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return early_gpio_table;
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}
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}
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const __weak struct soc_amd_gpio *variant_sleep_gpio_table(size_t *size)
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{
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*size = ARRAY_SIZE(sleep_gpio_table);
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return sleep_gpio_table;
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}
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@ -21,4 +21,7 @@ const struct soc_amd_gpio *variant_override_gpio_table(size_t *size);
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/* This function provides early GPIO init in bootblock or psp. */
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/* This function provides early GPIO init in bootblock or psp. */
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const struct soc_amd_gpio *variant_early_gpio_table(size_t *size);
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const struct soc_amd_gpio *variant_early_gpio_table(size_t *size);
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/* This function provides GPIO settings before entering sleep. */
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const struct soc_amd_gpio *variant_sleep_gpio_table(size_t *size);
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#endif /* __BASEBOARD_VARIANTS_H__ */
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#endif /* __BASEBOARD_VARIANTS_H__ */
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