IEI NOVA-4899R: Fix incorrect irq_tables.c.
Signed-off-by: Luis Correia <luis.f.correia@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2666 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Luis Correia
Uwe Hermann
parent
8bcf08b119
commit
197daeda5a
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/* This file was generated by getpir.c, do not modify!
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(but if you do, please run checkpir on it to verify)
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* Contains the IRQ Routing Table dumped directly from your memory, which BIOS sets up
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/*
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* This file is part of the LinuxBIOS project.
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*
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* Documentation at : http://www.microsoft.com/hwdev/busbios/PCIIRQ.HTM
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* Copyright (C) 2007 Luis Correia <luis.f.correia@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <arch/pirq_routing.h>
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/*
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* IRQ 5530 USB Network Network Network free
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* controller northbridge device device#0 device#1 device#2 slot
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* 00.13.0 00.0a.00 00.0b.00 00.0c.00 00.0f.00
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* ------------------------------------------------------------------------
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* 14 INTA# INTA# n.c. n.c. n.c. INTA#
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* 5 INTB# n.c. n.c. n.c. INTA# n.c.
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* 10 INTC# n.c. n.c. INTA# n.c. n.c.
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* 11 INTD# n.c. INTA# n.c. n.c. n.c.
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*/
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/*
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* - the USB controller should be connected to IRQ14
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* - the network controller #0 should be connected to IRQ11
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* - the network controller #1 should be connected to IRQ10
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* - the network controller #2 should be connected to IRQ5
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* - the additional PCI slot must share the IRQ with the internal USB
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*/
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#define IRQ_BITMAP_LINK0 0x0200 /* bit 9 means IRQ 9 available for this cs5530 INT input*/
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#define IRQ_BITMAP_LINK1 0x0020 /* bit 5 means IRQ 5 available for this cs5530 INT input*/
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#define IRQ_BITMAP_LINK2 0x0400 /* bit 10 means IRQ10 available for this cs5530 INT input*/
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#define IRQ_BITMAP_LINK3 0x0800 /* bit 11 means IRQ11 available for this cs5530 INT input*/
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const struct irq_routing_table intel_irq_routing_table = {
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PIRQ_SIGNATURE, /* u32 signature */
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PIRQ_VERSION, /* u16 version */
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32+16*5, /* there can be total 5 devices on the bus */
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0x00, /* Where the interrupt router lies (bus) */
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(0x12<<3)|0x0, /* Where the interrupt router lies (dev) */
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0xe00, /* IRQs devoted exclusively to PCI usage */
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0x1078, /* Vendor */
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0x0002, /* Device */
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0, /* Crap (miniport) */
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{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
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0x2d, /* u8 checksum , this hase to set to some value that would give 0 after the sum of all bytes for this structure (including checksum) */
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{
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/* bus, dev|fn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */
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// USB
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{0x00,(0x13<<3)|0x0, {{0x01, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0x0deb8}}, 0x0, 0x0},
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// eth0
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{0x00,(0x0a<<3)|0x0, {{0x02, 0xdeb8}, {0x03, 0xdeb8}, {0x04, 0xdeb8}, {0x00, 0x0deb8}}, 0x0, 0x0},//0x3, 0x0},
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// eth1
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{0x00,(0x0b<<3)|0x0, {{0x03, 0xdeb8}, {0x04, 0xdeb8}, {0x02, 0xdeb8}, {0x00, 0x0deb8}}, 0x0, 0x0},//0x2, 0x0},
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// eth2
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{0x00,(0x0c<<3)|0x0, {{0x04, 0xdeb8}, {0x02, 0xdeb8}, {0x03, 0xdeb8}, {0x00, 0x0deb8}}, 0x0, 0x0},//0x1, 0x0},
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// PCI slot
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{0x00,(0x0f<<3)|0x0, {{0x04, 0xdeb8}, {0x03, 0xdeb8}, {0x02, 0xdeb8}, {0x00, 0x0deb8}}, 0x0, 0x0},
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.signature = PIRQ_SIGNATURE, /* u32 signature */
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.version = PIRQ_VERSION, /* u16 version */
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.size = 32+16*IRQ_SLOT_COUNT, /* there can be total 4 devices on the bus */
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.rtr_bus = 0x00, /* Where the interrupt router lies (bus) */
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.rtr_devfn = (0x12<<3)|0x0, /* Where the interrupt router lies (dev) */
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.exclusive_irqs = 0x4C20, /* IRQs devoted exclusively to PCI usage */
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.rtr_vendor = 0x1078, /* Vendor */
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.rtr_device = 0x0100, /* Device */
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.miniport_data = 0, /* Crap (miniport) */
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.checksum = 0xBF+16, /* TODO! calculate correct sum ! */
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/*
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* Definition for "slot#0". There is no real slot,
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* the network device is soldered...
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*/
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.slots = {
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[0] = {
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.bus = 0x00,
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.devfn = (0x0a<<3)|0x0,
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.irq = {
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[0] = {
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.link = 0x03, /* INT C */
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.bitmap = IRQ_BITMAP_LINK2
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},
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[1] = {
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.link = 0x02, /* INT B */
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.bitmap = IRQ_BITMAP_LINK1
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},
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[2] = { /* = device INTA output */
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.link = 0x01, /* INT A */
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.bitmap = IRQ_BITMAP_LINK0
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},
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[3] = {
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.link = 0x04, /* = cs5530 INT D input */
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.bitmap = IRQ_BITMAP_LINK3
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}
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},
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.slot = 0x3, /* soldered */
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},
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/*
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* Definition for "slot#1". There is no real slot,
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* the network device is soldered...
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*
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* Configuration is ommited on purpose in the attempt of solving the
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* issue with IRQ panics (this is device is actually eth1)
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[1] = {
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.bus = 0x00,
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.devfn = (0x0b<<3)|0x0,
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.irq = {
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[0] = {
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.link = 0x04,
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.bitmap = IRQ_BITMAP_LINK3
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},
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[1] = {
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.link = 0x03,
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.bitmap = IRQ_BITMAP_LINK2
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},
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[2] = {
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.link = 0x02,
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.bitmap = IRQ_BITMAP_LINK1
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},
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[3] = {
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.link = 0x01,
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.bitmap = IRQ_BITMAP_LINK0
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}
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},
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.slot = 0x2,
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},
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*/
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/*
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* Definition for "slot#2". There is no real slot,
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* the network device is soldered...
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*/
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[2] = {
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.bus = 0x00,
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.devfn = (0x0c<<3)|0x0,
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.irq = {
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[0] = {
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.link = 0x01, /* INT A */
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.bitmap = IRQ_BITMAP_LINK0
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},
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[1] = {
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.link = 0x04, /* INT D */
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.bitmap = IRQ_BITMAP_LINK3
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},
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[2] = { /* = device INTA output */
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.link = 0x03, /* INT C */
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.bitmap = IRQ_BITMAP_LINK2
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},
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[3] = {
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.link = 0x02, /* = cs5530 INT B input */
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.bitmap = IRQ_BITMAP_LINK1
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}
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},
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.slot = 0x1, /* soldered */
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},
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/*
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* This is a free PCI slot
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*/
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[3] = {
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.bus = 0x00,
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.devfn = (0x0f<<3)|0x0,
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.irq = {
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[0] = { /* = device INTA output */
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.link = 0x04, /* INT D */
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.bitmap = IRQ_BITMAP_LINK3
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},
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[1] = {
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.link = 0x03, /* = cs5530 INT C input */
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.bitmap = IRQ_BITMAP_LINK2
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},
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[2] = {
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.link = 0x02, /* INT B */
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.bitmap = IRQ_BITMAP_LINK1
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},
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[3] = {
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.link = 0x01, /* INT A */
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.bitmap = IRQ_BITMAP_LINK0
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}
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},
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.slot = 0x6, /* FIXME: should be not 0, as it defines a real slot */
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},
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/*
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* Definition for "slot#3". There is no real slot,
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* the USB device is embedded...
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*/
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[4] = {
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.bus = 0x00,
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.devfn = (0x13<<3)|0x0,
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.irq = {
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[0] = {
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.link = 0x02, /* INT B */
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.bitmap = IRQ_BITMAP_LINK1
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},
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[1] = {
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.link = 0x01, /* INT A */
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.bitmap = IRQ_BITMAP_LINK0
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},
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[2] = {
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.link = 0x04, /* INT D */
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.bitmap = IRQ_BITMAP_LINK3
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},
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[3] = {
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.link = 0x03, /* INT C */
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.bitmap = IRQ_BITMAP_LINK2
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}
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},
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.slot = 0x5, /* chip internal */
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}
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}
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};
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/**
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* Copy the IRQ routing table to memory.
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*
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* @param addr Destination address (between 0xF0000...0x100000).
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* @return The end address of the pirq routing table in memory.
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**/
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unsigned long write_pirq_routing_table(unsigned long addr)
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{
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return copy_pirq_routing_table(addr);
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}
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