soc/mediatek/mt8192: ufs: Disable reference clock

UFS reference clock (refclk) is enabled by default, which will cause
the UFSHCI to hold the SPM signal and lead to suspend failure. Since
UFS kernel driver is not built-in, disable refclk in coreboot stage.

Signed-off-by: Wenbin Mei <wenbin.mei@mediatek.com>
Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com>
Change-Id: If11c1b756ad1a0b85f1005f56a6cb4648c687cf0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46408
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>

src/soc/mediatek/mt8192/Makefile.inc

@@ -55,6 +55,7 @@ ramstage-y += spm.c
 ramstage-y += sspm.c
 ramstage-y += ../common/timer.c
 ramstage-y += ../common/uart.c
+ramstage-y += ufs.c
 ramstage-y += ../common/usb.c usb.c
 
 MT8192_BLOB_DIR := 3rdparty/blobs/soc/mediatek/mt8192

src/soc/mediatek/mt8192/include/soc/addressmap.h

@@ -49,6 +49,7 @@ enum {
 	SPI7_BASE		= IO_PHYS + 0x0101E000,
 	SSUSB_IPPC_BASE		= IO_PHYS + 0x01203e00,
 	SFLASH_REG_BASE		= IO_PHYS + 0x01234000,
+	UFSHCI_BASE		= IO_PHYS + 0x01270000,
 	EFUSEC_BASE		= IO_PHYS + 0x01C10000,
 	IOCFG_RM_BASE		= IO_PHYS + 0x01C20000,
 	I2C_BASE		= IO_PHYS + 0x01CB0000,

src/soc/mediatek/mt8192/include/soc/ufs.h

@@ -0,0 +1,17 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef SOC_MEDIATEK_MT8192_UFS_H
+#define SOC_MEDIATEK_MT8192_UFS_H
+
+#include <device/mmio.h>
+#include <soc/addressmap.h>
+
+void ufs_disable_refclk(void);
+
+enum ufshci_offset {
+	REG_UFS_REFCLK_CTRL = 0x144,
+};
+
+#define UFS_REFCLK_CTRL	(UFSHCI_BASE + REG_UFS_REFCLK_CTRL)
+
+#endif /* SOC_MEDIATEK_MT8192_UFS_H */

src/soc/mediatek/mt8192/soc.c

@@ -5,6 +5,7 @@
 #include <soc/mcupm.h>
 #include <soc/mmu_operations.h>
 #include <soc/sspm.h>
+#include <soc/ufs.h>
 #include <symbols.h>
 
 static void soc_read_resources(struct device *dev)
@@ -17,6 +18,7 @@ static void soc_init(struct device *dev)
 	mtk_mmu_disable_l2c_sram();
 	mcupm_init();
 	sspm_init();
+	ufs_disable_refclk();
 }
 
 static struct device_operations soc_ops = {

src/soc/mediatek/mt8192/ufs.c

@@ -0,0 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <soc/ufs.h>
+
+void ufs_disable_refclk(void)
+{
+	/* disable ref clock to let UFSHCI release SPM signal */
+	write32((void *)UFS_REFCLK_CTRL, 0);
+}