cpu/intel/speedstep: Refactor P-state coordination
Change-Id: I12462f271821d3d8fe3324d84a65c2341729591e Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/74398 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
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@ -60,6 +60,16 @@ static void gen_pstate_entries(const sst_table_t *const pstates,
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acpigen_write_PPC(0);
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}
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static uint8_t get_p_state_coordination(void)
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{
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/* For Penryn use HW_ALL. */
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if (((cpuid_eax(1) >> 4) & 0xffff) == 0x1067)
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return HW_ALL;
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/* Use SW_ANY as that was the default. */
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return SW_ANY;
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}
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/**
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* @brief Generate ACPI entries for Speedstep for each cpu
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*/
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@ -71,22 +81,17 @@ void generate_cpu_entries(const struct device *device)
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int numcpus = totalcores/cores_per_package; /* This assumes that all
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CPUs share the same
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layout. */
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int num_cstates;
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const acpi_cstate_t *cstates;
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sst_table_t pstates;
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uint8_t coordination;
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uint8_t coordination = get_p_state_coordination();
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printk(BIOS_DEBUG, "Found %d CPU(s) with %d core(s) each.\n",
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numcpus, cores_per_package);
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num_cstates = get_cst_entries(&cstates);
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speedstep_gen_pstates(&pstates);
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if (((cpuid_eax(1) >> 4) & 0xffff) == 0x1067)
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/* For Penryn use HW_ALL. */
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coordination = HW_ALL;
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else
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/* Use SW_ANY as that was the default. */
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coordination = SW_ANY;
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for (cpuID = 0; cpuID < numcpus; ++cpuID) {
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for (coreID = 1; coreID <= cores_per_package; coreID++) {
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