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AMD Family15tn: Set the mask of MTRR to 0000FFFXX0000800 

Remove the warning message from linux dmesg,
mtrr: your BIOS has configured as incorrect mask, fixing it.

Change-Id: I355509db12ab10c33b7c1c23e2c7c4783f30e67e
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Signed-off-by: zbao <fishbaozi@gmail.com>
Reviewed-on: http://review.coreboot.org/1349
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
This commit is contained in:
zbao 2012-07-24 17:56:48 +08:00 committed by Ronald G. Minnich
parent 405cfe219a
commit 19a185448a
3 changed files with 3 additions and 3 deletions
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2
src/mainboard/amd/dinar/agesawrapper.c
View File

@ -270,7 +270,7 @@ agesawrapper_amdinitmmio (
/* Set ROM cache onto WP to decrease post time */ /* Set ROM cache onto WP to decrease post time */
MsrReg = (0x0100000000 - CONFIG_ROM_SIZE) | 5; MsrReg = (0x0100000000 - CONFIG_ROM_SIZE) | 5;
LibAmdMsrWrite (0x20E, &MsrReg, &StdHeader); LibAmdMsrWrite (0x20E, &MsrReg, &StdHeader);
MsrReg = (0x1000000000 - CONFIG_ROM_SIZE) | 0x800; MsrReg = (0x1000000000000ull - CONFIG_ROM_SIZE) | 0x800;
LibAmdMsrWrite (0x20F, &MsrReg, &StdHeader); LibAmdMsrWrite (0x20F, &MsrReg, &StdHeader);
Status = AGESA_SUCCESS; Status = AGESA_SUCCESS;

2
src/mainboard/amd/parmer/agesawrapper.c
View File

@ -166,7 +166,7 @@ agesawrapper_amdinitmmio (
/* Set ROM cache onto WP to decrease post time */ /* Set ROM cache onto WP to decrease post time */
MsrReg = (0x0100000000ull - CONFIG_ROM_SIZE) | 5ull; MsrReg = (0x0100000000ull - CONFIG_ROM_SIZE) | 5ull;
LibAmdMsrWrite (0x20C, &MsrReg, &StdHeader); LibAmdMsrWrite (0x20C, &MsrReg, &StdHeader);
MsrReg = (0x1000000000ull - CONFIG_ROM_SIZE) | 0x800ull; MsrReg = (0x1000000000000ull - CONFIG_ROM_SIZE) | 0x800ull;
LibAmdMsrWrite (0x20D, &MsrReg, &StdHeader); LibAmdMsrWrite (0x20D, &MsrReg, &StdHeader);
Status = AGESA_SUCCESS; Status = AGESA_SUCCESS;

2
src/mainboard/amd/torpedo/agesawrapper.c
View File

@ -281,7 +281,7 @@ agesawrapper_amdinitmmio (
/* Set ROM cache onto WP to decrease post time */ /* Set ROM cache onto WP to decrease post time */
MsrReg = (0x0100000000ull - CONFIG_ROM_SIZE) | 5ull; MsrReg = (0x0100000000ull - CONFIG_ROM_SIZE) | 5ull;
LibAmdMsrWrite (0x20C, &MsrReg, &StdHeader); LibAmdMsrWrite (0x20C, &MsrReg, &StdHeader);
MsrReg = (0x1000000000ull - CONFIG_ROM_SIZE) | 0x800ull; MsrReg = (0x1000000000000ull - CONFIG_ROM_SIZE) | 0x800ull;
LibAmdMsrWrite (0x20D, &MsrReg, &StdHeader); LibAmdMsrWrite (0x20D, &MsrReg, &StdHeader);
/* Clear all pending SMI. On S3 clear power button enable so it wll not generate an SMI */ /* Clear all pending SMI. On S3 clear power button enable so it wll not generate an SMI */