southbridge: Remove useless include <device/pci_ids.h>

Change-Id: Ia640131479d4221ccd84613033f28de3932b8bff
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/30120
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
This commit is contained in:
Elyes HAOUAS 2018-12-12 15:11:01 +01:00 committed by Patrick Georgi
parent 17115156b0
commit 19ea62e19d
38 changed files with 2 additions and 38 deletions

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@ -15,7 +15,6 @@
#include <stdint.h>
#include <arch/io.h>
#include <device/pci_ids.h>
/*
* Enable 4MB (LPC) ROM access at 0xFFC00000 - 0xFFFFFFFF.

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@ -17,7 +17,6 @@
#ifndef HUDSON_H
#define HUDSON_H
#include <device/pci_ids.h>
#include <device/device.h>
#include "chip.h"

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@ -13,9 +13,10 @@
* GNU General Public License for more details.
*/
#include "amd8111.h"
#include <device/pci_ids.h>
#include <reset.h>
#include <southbridge/amd/common/reset.h>
#include "amd8111.h"
unsigned get_sbdn(unsigned bus)
{

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@ -18,7 +18,6 @@
#define HUDSON_H
#include <types.h>
#include <device/pci_ids.h>
#include <device/device.h>
#include "chip.h"

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@ -18,7 +18,6 @@
#include <arch/cpu.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
#include <cpu/x86/msr.h>
#include <cpu/amd/mtrr.h>

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@ -16,7 +16,6 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
#include <delay.h>
#include "rs780.h"

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@ -18,7 +18,6 @@
#include <arch/acpi.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
#include <cpu/x86/msr.h>
#include <cpu/amd/mtrr.h>

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@ -18,7 +18,6 @@
#include <rules.h>
#include <stdint.h>
#include <device/pci_ids.h>
#include "chip.h"
#include "rev.h"

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@ -16,7 +16,6 @@
#include <stdint.h>
#include <arch/io.h>
#include <device/pci_ids.h>
#define IO_MEM_PORT_DECODE_ENABLE_5 0x48
#define IO_MEM_PORT_DECODE_ENABLE_6 0x4a

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@ -17,7 +17,6 @@
#ifndef SB700_H
#define SB700_H
#include <device/pci_ids.h>
#include "chip.h"
/* Power management index/data registers */

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@ -15,7 +15,6 @@
#include <stdint.h>
#include <arch/io.h>
#include <device/pci_ids.h>
/*
* Enable 4MB (LPC) ROM access at 0xFFC00000 - 0xFFFFFFFF.

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@ -17,7 +17,6 @@
#ifndef SB800_H
#define SB800_H
#include <device/pci_ids.h>
#include "chip.h"
/* Power management index/data registers */

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@ -17,7 +17,6 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
#include <delay.h>
#include "sr5650.h"

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@ -19,7 +19,6 @@
#include <stdint.h>
#include <arch/acpi.h>
#include <device/pci_ids.h>
#include "chip.h"
#include "rev.h"

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@ -17,7 +17,6 @@
#include <arch/io.h>
#include <console/console.h>
#include <delay.h>
#include <device/pci_ids.h>
#include <device/pci_def.h>
#include <halt.h>
#include <string.h>

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@ -17,7 +17,6 @@
#include <arch/io.h>
#include <console/console.h>
#include <delay.h>
#include <device/pci_ids.h>
#include <device/pci_def.h>
#include <halt.h>
#include <string.h>

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@ -16,7 +16,6 @@
#include <arch/io.h>
#include <console/console.h>
#include <device/pci_ids.h>
#include <device/pci_def.h>
#include <southbridge/intel/common/smbus.h>
#include "pch.h"

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@ -16,7 +16,6 @@
#include <arch/io.h>
#include <console/console.h>
#include <device/pci_ids.h>
#include <device/pci_def.h>
#include <delay.h>
#include "pch.h"

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@ -15,7 +15,6 @@
*/
#include <arch/io.h>
#include <device/pci_ids.h>
#include <device/pci_def.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
#include "pch.h"

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@ -15,7 +15,6 @@
*/
#include <arch/io.h>
#include <device/pci_ids.h>
#include <device/pci_def.h>
#include "pch.h"

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@ -25,7 +25,6 @@
#include <delay.h>
#include <arch/io.h>
#include <console/console.h>
#include <device/pci_ids.h>
#include <device/pci.h>
#include <spi_flash.h>

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@ -16,7 +16,6 @@
#include <arch/io.h>
#include <console/console.h>
#include <device/pci_ids.h>
#include <device/pci_def.h>
#include <southbridge/intel/common/smbus.h>
#include "soc.h"

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@ -16,7 +16,6 @@
#include <arch/io.h>
#include <console/console.h>
#include <device/pci_ids.h>
#include <device/pci_def.h>
#include <delay.h>
#include "soc.h"

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@ -15,7 +15,6 @@
*/
#include <arch/io.h>
#include <device/pci_ids.h>
#include <device/pci_def.h>
#include "soc.h"

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@ -21,7 +21,6 @@
#include <arch/acpigen.h>
#include <arch/smp/mpspec.h>
#include <device/device.h>
#include <device/pci_ids.h>
#include "i82371eb.h"
static int determine_total_number_of_cores(void)

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@ -16,7 +16,6 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include "i82801dx.h"
void i82801dx_enable(struct device *dev)

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@ -16,7 +16,6 @@
#include <arch/io.h>
#include <console/console.h>
#include <device/pci_ids.h>
#include <device/pci_def.h>
#include <southbridge/intel/common/smbus.h>
#include "i82801gx.h"

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@ -17,7 +17,6 @@
#include <arch/io.h>
#include <console/console.h>
#include <device/pci_ids.h>
#include <device/pci_def.h>
#include <southbridge/intel/common/smbus.h>
#include "i82801ix.h"

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@ -17,7 +17,6 @@
#include <arch/io.h>
#include <console/console.h>
#include <device/pci_ids.h>
#include <device/pci_def.h>
#include <southbridge/intel/common/smbus.h>
#include "i82801jx.h"

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@ -16,7 +16,6 @@
#include <arch/io.h>
#include <console/console.h>
#include <device/pci_ids.h>
#include <device/pci_def.h>
#include <southbridge/intel/common/smbus.h>
#include "pch.h"

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@ -23,7 +23,6 @@
#include <arch/smp/mpspec.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
unsigned long acpi_fill_madt(unsigned long current)
{

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@ -17,7 +17,6 @@
#include <arch/io.h>
#include <console/console.h>
#include <delay.h>
#include <device/pci_ids.h>
#include <halt.h>
#include <string.h>
#include "me.h"

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@ -16,7 +16,6 @@
#include <arch/io.h>
#include <console/console.h>
#include <device/pci_ids.h>
#include <device/pci_def.h>
#include <southbridge/intel/common/smbus.h>
#include "pch.h"

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@ -16,7 +16,6 @@
#include <arch/io.h>
#include <console/console.h>
#include <device/pci_ids.h>
#include <device/pci_def.h>
#include <delay.h>
#include "pch.h"

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@ -15,7 +15,6 @@
*/
#include <arch/io.h>
#include <device/pci_ids.h>
#include <device/pci_def.h>
#include "pch.h"

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@ -18,7 +18,6 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ops.h>
#include <device/pci_ids.h>
#include <console/console.h>
#include <device/cardbus.h>
#include "pci7420.h"

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@ -18,7 +18,6 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ops.h>
#include <device/pci_ids.h>
#include <console/console.h>
#include <device/cardbus.h>
#include "pci7420.h"

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@ -17,7 +17,6 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ops.h>
#include <device/pci_ids.h>
#include <console/console.h>
#include <device/cardbus.h>