From 19fd2112f777054d9cfb4999ed9616d3460eaa76 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Sun, 16 Oct 2011 18:12:59 +0300 Subject: [PATCH] Append logical PME/GPIO device. Fix MPU device number. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit A mainboard may require configuration of the superio pins to fully support some features. Things like A20# gate, leds, fans, infra-red and bootstrap jumpers may be configured and controlled through the logical PME device. Change-Id: I6e77ff0295806ba3dff339013f73d99c2961388f Signed-off-by: Kyösti Mälkki Reviewed-on: http://review.coreboot.org/289 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/superio/smsc/lpc47m10x/lpc47m10x.h | 2 +- src/superio/smsc/lpc47m10x/superio.c | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/src/superio/smsc/lpc47m10x/lpc47m10x.h b/src/superio/smsc/lpc47m10x/lpc47m10x.h index 4c78d9e632..535a4148cb 100644 --- a/src/superio/smsc/lpc47m10x/lpc47m10x.h +++ b/src/superio/smsc/lpc47m10x/lpc47m10x.h @@ -30,7 +30,7 @@ #define LPC47M10X2_KBC 7 /* Keyboard & Mouse */ #define LPC47M10X2_GAME 9 /* GAME */ #define LPC47M10X2_PME 10 /* PME reg*/ -#define LPC47M10X2_MPU 10 /* MPE -- who knows -- reg*/ // FIXME +#define LPC47M10X2_MPU 11 /* MPU-401 MIDI */ #define LPC47M10X2_MAX_CONFIG_REGISTER 0x5F diff --git a/src/superio/smsc/lpc47m10x/superio.c b/src/superio/smsc/lpc47m10x/superio.c index 0be8742e45..3d6a8ed1d7 100644 --- a/src/superio/smsc/lpc47m10x/superio.c +++ b/src/superio/smsc/lpc47m10x/superio.c @@ -65,6 +65,7 @@ static struct pnp_info pnp_dev_info[] = { { &ops, LPC47M10X2_SP1, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, }, { &ops, LPC47M10X2_SP2, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, }, { &ops, LPC47M10X2_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, {0x07ff, 0}, {0x07ff, 4}, }, + { &ops, LPC47M10X2_PME, PNP_IO0, { 0x0f80, 0 }, }, }; /**