soc/intel/fsp_broadwell_de: Add fixed VT-d MMIO range to the resources
FSP initializes the VT-d feature on Broadwell-DE and assigns an address space to the MMIO range. coreboot's resource allocator needs to be aware of this fixed resource as otherwise the address can be assigned to a different PCI device. In this case addresses are overlapped and the VT-d range is not accessible any more. To deal with it the right way add a fixed MMIO resource to the resources list if VT-d BAR is enabled. TEST=Booted into Linux and checked coreboot log for resource assignment. Change-Id: I626ac17420eadc0b49031e850f0f40b3b221a098 Signed-off-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-on: https://review.coreboot.org/28672 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
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@ -3,7 +3,7 @@
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*
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* Copyright (C) 2013 Google, Inc.
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* Copyright (C) 2015-2016 Intel Corp.
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* Copyright (C) 2017 Siemens AG
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* Copyright (C) 2017-2018 Siemens AG
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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#define VTBAR_OFFSET 0x180
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#define VTBAR_MASK 0xffffe000
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#define VTBAR_ENABLED 0x01
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#define VTBAR_SIZE 0x2000
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#define SMM_FEATURE_CONTROL 0x58
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#define SMM_CPU_SAVE_EN (1 << 1)
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@ -17,10 +17,24 @@
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#include <device/pci_ids.h>
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#include <soc/pci_devs.h>
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#include <soc/acpi.h>
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#include <soc/broadwell_de.h>
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static void vtd_read_resources(struct device *dev)
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{
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uint32_t vtbar;
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/* Add fixed MMIO resource for VT-d which was set up by the FSP. */
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vtbar = pci_read_config32(dev, VTBAR_OFFSET);
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if (vtbar & VTBAR_ENABLED) {
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mmio_resource(dev, VTBAR_OFFSET,
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(vtbar & VTBAR_MASK) / KiB, VTBAR_SIZE / KiB);
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}
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}
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static struct device_operations vtd_ops = {
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.write_acpi_tables = vtd_write_acpi_tables,
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.read_resources = vtd_read_resources,
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.write_acpi_tables = vtd_write_acpi_tables,
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};
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static const struct pci_driver vtd_driver __pci_driver = {
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