drivers/usb/pci_xhci: Add a driver to generate xHCI ACPI nodes
We can use xhci_for_each_ext_cap to inspect the xHC so we generate the
correct number of device nodes.
Scope (\_SB.PCI0.PBRA)
{
Device (XHC1)
{
Name (_ADR, 0x0000000000000004) // _ADR: Address
Method (_STA, 0, NotSerialized) // _STA: Status
{
Return (0x0F)
}
Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
{
0x1F,
0x03
})
Device (RHUB)
{
Name (_ADR, Zero) // _ADR: Address
Device (HS01)
{
Name (_ADR, 0x01) // _ADR: Address
}
Device (HS02)
{
Name (_ADR, 0x02) // _ADR: Address
}
Device (SS01)
{
Name (_ADR, 0x03) // _ADR: Address
}
}
Name (_S0W, Zero) // _S0W: S0 Device Wake State
Name (_S3W, 0x04) // _S3W: S3 Device Wake State
Name (_S4W, 0x04) // _S4W: S4 Device Wake State
}
}
BUG=b:154756391
TEST=Boot trembyle and look at ACPI table. See all xHCI nodes.
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I44ebaef342e45923bc181ceebef882358d33f0d1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41900
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Raul E Rangel
Felix Held
parent
fc06af867e
commit
1a31b103c7
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@ -0,0 +1,6 @@
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config DRIVERS_USB_PCI_XHCI
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def_bool n
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depends on HAVE_ACPI_TABLES
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select XHCI_UTILS
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help
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PCI driver that generates ACPI nodes for an xHCI compatible controller.
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@ -0,0 +1 @@
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ramstage-$(CONFIG_DRIVERS_USB_PCI_XHCI) += pci_xhci.c
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@ -0,0 +1,184 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include "pci_xhci.h"
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#include <acpi/acpigen.h>
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#include <console/console.h>
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#include <device/pci.h>
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#include <device/pci_ids.h>
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#include <device/xhci.h>
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#include <stdlib.h>
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#include <string.h>
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#define PCI_XHCI_CLASSCODE 0x0c0330 /* USB3.0 xHCI controller */
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static unsigned int controller_count;
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static const struct device_operations xhci_pci_ops;
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struct port_counts {
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unsigned int high_speed;
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unsigned int super_speed;
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};
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__weak enum cb_err pci_xhci_get_wake_gpe(const struct device *dev, int *gpe)
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{
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*gpe = -1;
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return CB_SUCCESS;
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}
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static const char *xhci_acpi_name(const struct device *dev)
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{
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char *name;
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unsigned int port_id;
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if (dev->path.type == DEVICE_PATH_USB) {
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/* Ports index start at 1 */
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port_id = dev->path.usb.port_id + 1;
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switch (dev->path.usb.port_type) {
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case 0:
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return "RHUB";
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case 2:
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name = malloc(ACPI_NAME_BUFFER_SIZE);
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snprintf(name, ACPI_NAME_BUFFER_SIZE, "HS%02d", port_id);
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name[4] = '\0';
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return name;
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case 3:
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name = malloc(ACPI_NAME_BUFFER_SIZE);
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snprintf(name, ACPI_NAME_BUFFER_SIZE, "SS%02d", port_id);
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name[4] = '\0';
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return name;
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}
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} else if (dev->ops == &xhci_pci_ops) {
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return dev->name;
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}
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printk(BIOS_ERR, "%s: Unknown device %s\n", __func__, dev_path(dev));
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return NULL;
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}
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static void handle_xhci_ext_cap(void *context, const struct xhci_ext_cap *cap)
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{
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const struct xhci_supported_protocol *data;
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const char *format;
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char buf[16];
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struct port_counts *counts = context;
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unsigned int *dev_num;
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if (cap->cap_id != XHCI_ECP_CAP_ID_SUPP)
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return;
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data = &cap->supported_protocol;
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xhci_print_supported_protocol(data);
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if (memcmp(data->name, "USB ", 4)) {
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printk(BIOS_INFO, "%s: Unknown Protocol: %.*s\n", __func__,
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(int)sizeof(data->name), data->name);
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return;
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}
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if (data->major_rev == 3) {
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format = "SS%02d";
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dev_num = &counts->super_speed;
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} else if (data->major_rev == 2) {
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format = "HS%02d";
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dev_num = &counts->high_speed;
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} else {
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printk(BIOS_INFO, "%s: Unknown USB Version: %#x\n", __func__, data->major_rev);
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return;
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}
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for (unsigned int i = 0; i < data->port_count; ++i) {
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snprintf(buf, sizeof(buf), format, ++(*dev_num));
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acpigen_write_device(buf);
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acpigen_write_name_byte("_ADR", data->port_offset + i);
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acpigen_pop_len();
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}
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}
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static void xhci_add_devices(const struct device *dev)
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{
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/* Used by the callback to track how many ports have been seen. */
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struct port_counts counts = {0, 0};
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acpigen_write_device("RHUB");
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acpigen_write_name_integer("_ADR", 0x00000000);
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xhci_for_each_ext_cap(dev, &counts, handle_xhci_ext_cap);
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acpigen_pop_len();
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}
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static void xhci_fill_ssdt(const struct device *dev)
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{
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int gpe;
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printk(BIOS_DEBUG, "xHCI SSDT generation\n");
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acpigen_write_scope(acpi_device_scope(dev));
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acpigen_write_device(acpi_device_name(dev));
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acpigen_write_ADR_pci_device(dev);
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acpigen_write_name_string("_DDN", "xHC - Extensible Host Controller");
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acpigen_write_STA(acpi_device_status(dev));
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if (pci_xhci_get_wake_gpe(dev, &gpe) == CB_SUCCESS) {
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printk(BIOS_DEBUG, "%s: Got GPE %d for %s\n", __func__, gpe, dev_path(dev));
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} else {
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printk(BIOS_ERR, "%s: Error getting GPE for : %s\n", __func__, dev_path(dev));
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gpe = -1;
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}
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if (gpe > 0) {
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acpigen_write_PRW(gpe, SLP_TYP_S3);
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acpigen_write_name_integer("_S0W", ACPI_DEVICE_SLEEP_D0);
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acpigen_write_name_integer("_S3W", ACPI_DEVICE_SLEEP_D3_COLD);
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acpigen_write_name_integer("_S4W", ACPI_DEVICE_SLEEP_D3_COLD);
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}
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xhci_add_devices(dev);
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acpigen_pop_len();
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acpigen_pop_len();
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}
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static void xhci_enable(struct device *dev)
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{
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char *name;
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uint32_t class = pci_read_config32(dev, PCI_CLASS_REVISION);
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/* Class code, the upper 3 bytes of PCI_CLASS_REVISION. */
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class >>= 8;
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if (class != PCI_XHCI_CLASSCODE) {
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printk(BIOS_ERR, "Incorrect xHCI class code: %#x\n", class);
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dev->enabled = 0;
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return;
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}
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name = malloc(ACPI_NAME_BUFFER_SIZE);
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snprintf(name, ACPI_NAME_BUFFER_SIZE, "XHC%d", controller_count++);
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dev->name = name;
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}
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static const struct device_operations xhci_pci_ops = {
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.read_resources = pci_dev_read_resources,
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.set_resources = pci_dev_set_resources,
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.enable_resources = pci_dev_enable_resources,
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.init = pci_dev_init,
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.scan_bus = scan_static_bus,
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.enable = xhci_enable,
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.ops_pci = &pci_dev_ops_pci,
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.acpi_fill_ssdt = xhci_fill_ssdt,
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.acpi_name = xhci_acpi_name,
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};
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static const unsigned short amd_pci_device_ids[] = {
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0
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};
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static const struct pci_driver xhci_pci_driver __pci_driver = {
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.ops = &xhci_pci_ops,
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.vendor = PCI_VENDOR_ID_AMD,
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.devices = amd_pci_device_ids,
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};
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@ -0,0 +1,15 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef __DRIVERS_USB_PCI_XHCI__
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#define __DRIVERS_USB_PCI_XHCI__
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#include <commonlib/bsd/cb_err.h>
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#include <device/device.h>
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/*
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* Returns the wake GPE for the Extensible Host Controller.
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* Set gpe to -1 if there is no GPE is available.
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*/
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enum cb_err pci_xhci_get_wake_gpe(const struct device *dev, int *gpe);
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#endif /* __DRIVERS_USB_PCI_XHCI__ */
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