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baytrail: Add defines and functions for GPNCORE 

BUG=chrome-os-partner:25159
BRANCH=firmware-rambi-5216.B
TEST=Build pass for Rambi

Original-Change-Id: I049f9254fe25aabf13d891579444bba2cfcf68c5
Original-Change-Id: Ib7c814660262e2507813ee5970190f98530dfe5e
Original-Signed-off-by: Kein Yuan <kein.yuan@intel.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/197984
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Commit-Queue: Shawn Nematbakhsh <shawnn@chromium.org>
Original-Tested-by: Shawn Nematbakhsh <shawnn@chromium.org>
(cherry picked from commit dd05055f2f74fc0e4875733c0e5dedcbae302bfa)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>

Change-Id: Iee01407a73bec420ab47d07524a3f1fd0f4d9817
Reviewed-on: http://review.coreboot.org/7892
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
This commit is contained in:
Kein Yuan 2014-05-01 18:57:11 -07:00 committed by Marc Jones
parent 0658d2348d
commit 1a3675ec02
1 changed files with 17 additions and 0 deletions
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17
src/soc/intel/baytrail/baytrail/gpio.h
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@ -344,6 +344,23 @@ struct soc_gpio_config* mainboard_get_gpios(void);
#define UART_TXD_PAD 83
#define PCU_SMB_CLK_PAD 88
#define PCU_SMB_DATA_PAD 90
#define SOC_DDI1_VDDEN_PAD 16
static inline unsigned int ncore_pconf0(int pad_num)
{
return GPNCORE_PAD_BASE + pad_num * 16;
}
static inline void ncore_select_func(int pad, int func)
{
uint32_t reg;
uint32_t pconf0_addr = ncore_pconf0(pad);
reg = read32(pconf0_addr);
reg &= ~0x7;
reg |= func & 0x7;
write32(pconf0_addr, reg);
}
static inline unsigned int score_pconf0(int pad_num)
{